[llvm-branch-commits] [llvm] 136f98e - [x86] adjust cost model values for minnum/maxnum with fast-math-flags
Sanjay Patel via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Tue Dec 1 08:21:11 PST 2020
Author: Sanjay Patel
Date: 2020-12-01T10:45:53-05:00
New Revision: 136f98e5236522f55693b8b2d23e87692987f734
URL: https://github.com/llvm/llvm-project/commit/136f98e5236522f55693b8b2d23e87692987f734
DIFF: https://github.com/llvm/llvm-project/commit/136f98e5236522f55693b8b2d23e87692987f734.diff
LOG: [x86] adjust cost model values for minnum/maxnum with fast-math-flags
Without FMF, we lower these intrinsics into something like this:
vmaxsd %xmm0, %xmm1, %xmm2
vcmpunordsd %xmm0, %xmm0, %xmm0
vblendvpd %xmm0, %xmm1, %xmm2, %xmm0
But if we can ignore NANs, the single min/max instruction is enough
because there is no need to fix up the x86 logic that corresponds to
X > Y ? X : Y.
We probably want to make other adjustments for FP intrinsics with FMF
to account for specialized codegen (for example, FSQRT).
Differential Revision: https://reviews.llvm.org/D92337
Added:
Modified:
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/fmaxnum.ll
llvm/test/Analysis/CostModel/X86/fminnum.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index 770317a9a8b5..36a04a850110 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -2802,93 +2802,105 @@ int X86TTIImpl::getTypeBasedIntrinsicInstrCost(
return LT.first * Cost;
}
+ auto adjustTableCost = [](const CostTblEntry &Entry, int LegalizationCost,
+ FastMathFlags FMF) {
+ // If there are no NANs to deal with, then these are reduced to a
+ // single MIN** or MAX** instruction instead of the MIN/CMP/SELECT that we
+ // assume is used in the non-fast case.
+ if (Entry.ISD == ISD::FMAXNUM || Entry.ISD == ISD::FMINNUM) {
+ if (FMF.noNaNs())
+ return LegalizationCost * 1;
+ }
+ return LegalizationCost * (int)Entry.Cost;
+ };
+
if (ST->useGLMDivSqrtCosts())
if (const auto *Entry = CostTableLookup(GLMCostTbl, ISD, MTy))
- return LT.first * Entry->Cost;
+ return adjustTableCost(*Entry, LT.first, ICA.getFlags());
if (ST->isSLM())
if (const auto *Entry = CostTableLookup(SLMCostTbl, ISD, MTy))
- return LT.first * Entry->Cost;
+ return adjustTableCost(*Entry, LT.first, ICA.getFlags());
if (ST->hasCDI())
if (const auto *Entry = CostTableLookup(AVX512CDCostTbl, ISD, MTy))
- return LT.first * Entry->Cost;
+ return adjustTableCost(*Entry, LT.first, ICA.getFlags());
if (ST->hasBWI())
if (const auto *Entry = CostTableLookup(AVX512BWCostTbl, ISD, MTy))
- return LT.first * Entry->Cost;
+ return adjustTableCost(*Entry, LT.first, ICA.getFlags());
if (ST->hasAVX512())
if (const auto *Entry = CostTableLookup(AVX512CostTbl, ISD, MTy))
- return LT.first * Entry->Cost;
+ return adjustTableCost(*Entry, LT.first, ICA.getFlags());
if (ST->hasXOP())
if (const auto *Entry = CostTableLookup(XOPCostTbl, ISD, MTy))
- return LT.first * Entry->Cost;
+ return adjustTableCost(*Entry, LT.first, ICA.getFlags());
if (ST->hasAVX2())
if (const auto *Entry = CostTableLookup(AVX2CostTbl, ISD, MTy))
- return LT.first * Entry->Cost;
+ return adjustTableCost(*Entry, LT.first, ICA.getFlags());
if (ST->hasAVX())
if (const auto *Entry = CostTableLookup(AVX1CostTbl, ISD, MTy))
- return LT.first * Entry->Cost;
+ return adjustTableCost(*Entry, LT.first, ICA.getFlags());
if (ST->hasSSE42())
if (const auto *Entry = CostTableLookup(SSE42CostTbl, ISD, MTy))
- return LT.first * Entry->Cost;
+ return adjustTableCost(*Entry, LT.first, ICA.getFlags());
if (ST->hasSSE41())
if (const auto *Entry = CostTableLookup(SSE41CostTbl, ISD, MTy))
- return LT.first * Entry->Cost;
+ return adjustTableCost(*Entry, LT.first, ICA.getFlags());
if (ST->hasSSSE3())
if (const auto *Entry = CostTableLookup(SSSE3CostTbl, ISD, MTy))
- return LT.first * Entry->Cost;
+ return adjustTableCost(*Entry, LT.first, ICA.getFlags());
if (ST->hasSSE2())
if (const auto *Entry = CostTableLookup(SSE2CostTbl, ISD, MTy))
- return LT.first * Entry->Cost;
+ return adjustTableCost(*Entry, LT.first, ICA.getFlags());
if (ST->hasSSE1())
if (const auto *Entry = CostTableLookup(SSE1CostTbl, ISD, MTy))
- return LT.first * Entry->Cost;
+ return adjustTableCost(*Entry, LT.first, ICA.getFlags());
if (ST->hasBMI()) {
if (ST->is64Bit())
if (const auto *Entry = CostTableLookup(BMI64CostTbl, ISD, MTy))
- return LT.first * Entry->Cost;
+ return adjustTableCost(*Entry, LT.first, ICA.getFlags());
if (const auto *Entry = CostTableLookup(BMI32CostTbl, ISD, MTy))
- return LT.first * Entry->Cost;
+ return adjustTableCost(*Entry, LT.first, ICA.getFlags());
}
if (ST->hasLZCNT()) {
if (ST->is64Bit())
if (const auto *Entry = CostTableLookup(LZCNT64CostTbl, ISD, MTy))
- return LT.first * Entry->Cost;
+ return adjustTableCost(*Entry, LT.first, ICA.getFlags());
if (const auto *Entry = CostTableLookup(LZCNT32CostTbl, ISD, MTy))
- return LT.first * Entry->Cost;
+ return adjustTableCost(*Entry, LT.first, ICA.getFlags());
}
if (ST->hasPOPCNT()) {
if (ST->is64Bit())
if (const auto *Entry = CostTableLookup(POPCNT64CostTbl, ISD, MTy))
- return LT.first * Entry->Cost;
+ return adjustTableCost(*Entry, LT.first, ICA.getFlags());
if (const auto *Entry = CostTableLookup(POPCNT32CostTbl, ISD, MTy))
- return LT.first * Entry->Cost;
+ return adjustTableCost(*Entry, LT.first, ICA.getFlags());
}
// TODO - add BMI (TZCNT) scalar handling
if (ST->is64Bit())
if (const auto *Entry = CostTableLookup(X64CostTbl, ISD, MTy))
- return LT.first * Entry->Cost;
+ return adjustTableCost(*Entry, LT.first, ICA.getFlags());
if (const auto *Entry = CostTableLookup(X86CostTbl, ISD, MTy))
- return LT.first * Entry->Cost;
+ return adjustTableCost(*Entry, LT.first, ICA.getFlags());
}
return BaseT::getIntrinsicInstrCost(ICA, CostKind);
diff --git a/llvm/test/Analysis/CostModel/X86/fmaxnum.ll b/llvm/test/Analysis/CostModel/X86/fmaxnum.ll
index 3116e65388e8..08f2474f0306 100644
--- a/llvm/test/Analysis/CostModel/X86/fmaxnum.ll
+++ b/llvm/test/Analysis/CostModel/X86/fmaxnum.ll
@@ -1,14 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE
-; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX1
-; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
+; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX512
;
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mcpu=slm | FileCheck %s --check-prefixes=SSE
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mcpu=goldmont | FileCheck %s --check-prefixes=SSE
-; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=AVX1
+; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=AVX,AVX1
define i32 @f32(i32 %arg) {
; SSE-LABEL: 'f32'
@@ -94,35 +94,27 @@ define i32 @f64(i32 %arg) {
define i32 @f32_nnan(i32 %arg) {
; SSE-LABEL: 'f32_nnan'
-; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %F32 = call nnan float @llvm.maxnum.f32(float undef, float undef)
-; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F32 = call nnan <2 x float> @llvm.maxnum.v2f32(<2 x float> undef, <2 x float> undef)
-; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F32 = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> undef, <4 x float> undef)
-; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F32 = call nnan <8 x float> @llvm.maxnum.v8f32(<8 x float> undef, <8 x float> undef)
-; SSE-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V16F32 = call nnan <16 x float> @llvm.maxnum.v16f32(<16 x float> undef, <16 x float> undef)
+; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call nnan float @llvm.maxnum.f32(float undef, float undef)
+; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F32 = call nnan <2 x float> @llvm.maxnum.v2f32(<2 x float> undef, <2 x float> undef)
+; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> undef, <4 x float> undef)
+; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = call nnan <8 x float> @llvm.maxnum.v8f32(<8 x float> undef, <8 x float> undef)
+; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = call nnan <16 x float> @llvm.maxnum.v16f32(<16 x float> undef, <16 x float> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
-; AVX1-LABEL: 'f32_nnan'
-; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %F32 = call nnan float @llvm.maxnum.f32(float undef, float undef)
-; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F32 = call nnan <2 x float> @llvm.maxnum.v2f32(<2 x float> undef, <2 x float> undef)
-; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V4F32 = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> undef, <4 x float> undef)
-; AVX1-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V8F32 = call nnan <8 x float> @llvm.maxnum.v8f32(<8 x float> undef, <8 x float> undef)
-; AVX1-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V16F32 = call nnan <16 x float> @llvm.maxnum.v16f32(<16 x float> undef, <16 x float> undef)
-; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
-;
-; AVX2-LABEL: 'f32_nnan'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %F32 = call nnan float @llvm.maxnum.f32(float undef, float undef)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F32 = call nnan <2 x float> @llvm.maxnum.v2f32(<2 x float> undef, <2 x float> undef)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V4F32 = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> undef, <4 x float> undef)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V8F32 = call nnan <8 x float> @llvm.maxnum.v8f32(<8 x float> undef, <8 x float> undef)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V16F32 = call nnan <16 x float> @llvm.maxnum.v16f32(<16 x float> undef, <16 x float> undef)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
+; AVX-LABEL: 'f32_nnan'
+; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call nnan float @llvm.maxnum.f32(float undef, float undef)
+; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F32 = call nnan <2 x float> @llvm.maxnum.v2f32(<2 x float> undef, <2 x float> undef)
+; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> undef, <4 x float> undef)
+; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = call nnan <8 x float> @llvm.maxnum.v8f32(<8 x float> undef, <8 x float> undef)
+; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F32 = call nnan <16 x float> @llvm.maxnum.v16f32(<16 x float> undef, <16 x float> undef)
+; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
; AVX512-LABEL: 'f32_nnan'
-; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = call nnan float @llvm.maxnum.f32(float undef, float undef)
-; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = call nnan <2 x float> @llvm.maxnum.v2f32(<2 x float> undef, <2 x float> undef)
-; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> undef, <4 x float> undef)
-; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = call nnan <8 x float> @llvm.maxnum.v8f32(<8 x float> undef, <8 x float> undef)
-; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F32 = call nnan <16 x float> @llvm.maxnum.v16f32(<16 x float> undef, <16 x float> undef)
+; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call nnan float @llvm.maxnum.f32(float undef, float undef)
+; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F32 = call nnan <2 x float> @llvm.maxnum.v2f32(<2 x float> undef, <2 x float> undef)
+; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> undef, <4 x float> undef)
+; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = call nnan <8 x float> @llvm.maxnum.v8f32(<8 x float> undef, <8 x float> undef)
+; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = call nnan <16 x float> @llvm.maxnum.v16f32(<16 x float> undef, <16 x float> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
%F32 = call nnan float @llvm.maxnum.f32(float undef, float undef)
@@ -135,35 +127,27 @@ define i32 @f32_nnan(i32 %arg) {
define i32 @f64_nnan(i32 %arg) {
; SSE-LABEL: 'f64_nnan'
-; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %f64 = call nnan double @llvm.maxnum.f64(double undef, double undef)
-; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2f64 = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> undef, <2 x double> undef)
-; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V4f64 = call nnan <4 x double> @llvm.maxnum.v4f64(<4 x double> undef, <4 x double> undef)
-; SSE-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8f64 = call nnan <8 x double> @llvm.maxnum.v8f64(<8 x double> undef, <8 x double> undef)
-; SSE-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V16f64 = call nnan <16 x double> @llvm.maxnum.v16f64(<16 x double> undef, <16 x double> undef)
+; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f64 = call nnan double @llvm.maxnum.f64(double undef, double undef)
+; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2f64 = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> undef, <2 x double> undef)
+; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4f64 = call nnan <4 x double> @llvm.maxnum.v4f64(<4 x double> undef, <4 x double> undef)
+; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8f64 = call nnan <8 x double> @llvm.maxnum.v8f64(<8 x double> undef, <8 x double> undef)
+; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16f64 = call nnan <16 x double> @llvm.maxnum.v16f64(<16 x double> undef, <16 x double> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
-; AVX1-LABEL: 'f64_nnan'
-; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %f64 = call nnan double @llvm.maxnum.f64(double undef, double undef)
-; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2f64 = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> undef, <2 x double> undef)
-; AVX1-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V4f64 = call nnan <4 x double> @llvm.maxnum.v4f64(<4 x double> undef, <4 x double> undef)
-; AVX1-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V8f64 = call nnan <8 x double> @llvm.maxnum.v8f64(<8 x double> undef, <8 x double> undef)
-; AVX1-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %V16f64 = call nnan <16 x double> @llvm.maxnum.v16f64(<16 x double> undef, <16 x double> undef)
-; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
-;
-; AVX2-LABEL: 'f64_nnan'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %f64 = call nnan double @llvm.maxnum.f64(double undef, double undef)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2f64 = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> undef, <2 x double> undef)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V4f64 = call nnan <4 x double> @llvm.maxnum.v4f64(<4 x double> undef, <4 x double> undef)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V8f64 = call nnan <8 x double> @llvm.maxnum.v8f64(<8 x double> undef, <8 x double> undef)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V16f64 = call nnan <16 x double> @llvm.maxnum.v16f64(<16 x double> undef, <16 x double> undef)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
+; AVX-LABEL: 'f64_nnan'
+; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f64 = call nnan double @llvm.maxnum.f64(double undef, double undef)
+; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2f64 = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> undef, <2 x double> undef)
+; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4f64 = call nnan <4 x double> @llvm.maxnum.v4f64(<4 x double> undef, <4 x double> undef)
+; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8f64 = call nnan <8 x double> @llvm.maxnum.v8f64(<8 x double> undef, <8 x double> undef)
+; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16f64 = call nnan <16 x double> @llvm.maxnum.v16f64(<16 x double> undef, <16 x double> undef)
+; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
; AVX512-LABEL: 'f64_nnan'
-; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f64 = call nnan double @llvm.maxnum.f64(double undef, double undef)
-; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2f64 = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> undef, <2 x double> undef)
-; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4f64 = call nnan <4 x double> @llvm.maxnum.v4f64(<4 x double> undef, <4 x double> undef)
-; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8f64 = call nnan <8 x double> @llvm.maxnum.v8f64(<8 x double> undef, <8 x double> undef)
-; AVX512-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16f64 = call nnan <16 x double> @llvm.maxnum.v16f64(<16 x double> undef, <16 x double> undef)
+; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f64 = call nnan double @llvm.maxnum.f64(double undef, double undef)
+; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2f64 = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> undef, <2 x double> undef)
+; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4f64 = call nnan <4 x double> @llvm.maxnum.v4f64(<4 x double> undef, <4 x double> undef)
+; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8f64 = call nnan <8 x double> @llvm.maxnum.v8f64(<8 x double> undef, <8 x double> undef)
+; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16f64 = call nnan <16 x double> @llvm.maxnum.v16f64(<16 x double> undef, <16 x double> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
%f64 = call nnan double @llvm.maxnum.f64(double undef, double undef)
diff --git a/llvm/test/Analysis/CostModel/X86/fminnum.ll b/llvm/test/Analysis/CostModel/X86/fminnum.ll
index f24acbdda36c..d0e5de8052bb 100644
--- a/llvm/test/Analysis/CostModel/X86/fminnum.ll
+++ b/llvm/test/Analysis/CostModel/X86/fminnum.ll
@@ -1,14 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE
-; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX1
-; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
+; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX512
;
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mcpu=slm | FileCheck %s --check-prefixes=SSE
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mcpu=goldmont | FileCheck %s --check-prefixes=SSE
-; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=AVX1
+; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=AVX,AVX1
define i32 @f32(i32 %arg) {
; SSE-LABEL: 'f32'
@@ -94,35 +94,27 @@ define i32 @f64(i32 %arg) {
define i32 @f32_nnan(i32 %arg) {
; SSE-LABEL: 'f32_nnan'
-; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %F32 = call nnan float @llvm.minnum.f32(float undef, float undef)
-; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F32 = call nnan <2 x float> @llvm.minnum.v2f32(<2 x float> undef, <2 x float> undef)
-; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F32 = call nnan <4 x float> @llvm.minnum.v4f32(<4 x float> undef, <4 x float> undef)
-; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F32 = call nnan <8 x float> @llvm.minnum.v8f32(<8 x float> undef, <8 x float> undef)
-; SSE-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V16F32 = call nnan <16 x float> @llvm.minnum.v16f32(<16 x float> undef, <16 x float> undef)
+; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call nnan float @llvm.minnum.f32(float undef, float undef)
+; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F32 = call nnan <2 x float> @llvm.minnum.v2f32(<2 x float> undef, <2 x float> undef)
+; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = call nnan <4 x float> @llvm.minnum.v4f32(<4 x float> undef, <4 x float> undef)
+; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = call nnan <8 x float> @llvm.minnum.v8f32(<8 x float> undef, <8 x float> undef)
+; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = call nnan <16 x float> @llvm.minnum.v16f32(<16 x float> undef, <16 x float> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
-; AVX1-LABEL: 'f32_nnan'
-; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %F32 = call nnan float @llvm.minnum.f32(float undef, float undef)
-; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F32 = call nnan <2 x float> @llvm.minnum.v2f32(<2 x float> undef, <2 x float> undef)
-; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V4F32 = call nnan <4 x float> @llvm.minnum.v4f32(<4 x float> undef, <4 x float> undef)
-; AVX1-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V8F32 = call nnan <8 x float> @llvm.minnum.v8f32(<8 x float> undef, <8 x float> undef)
-; AVX1-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V16F32 = call nnan <16 x float> @llvm.minnum.v16f32(<16 x float> undef, <16 x float> undef)
-; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
-;
-; AVX2-LABEL: 'f32_nnan'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %F32 = call nnan float @llvm.minnum.f32(float undef, float undef)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F32 = call nnan <2 x float> @llvm.minnum.v2f32(<2 x float> undef, <2 x float> undef)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V4F32 = call nnan <4 x float> @llvm.minnum.v4f32(<4 x float> undef, <4 x float> undef)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V8F32 = call nnan <8 x float> @llvm.minnum.v8f32(<8 x float> undef, <8 x float> undef)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V16F32 = call nnan <16 x float> @llvm.minnum.v16f32(<16 x float> undef, <16 x float> undef)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
+; AVX-LABEL: 'f32_nnan'
+; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call nnan float @llvm.minnum.f32(float undef, float undef)
+; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F32 = call nnan <2 x float> @llvm.minnum.v2f32(<2 x float> undef, <2 x float> undef)
+; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = call nnan <4 x float> @llvm.minnum.v4f32(<4 x float> undef, <4 x float> undef)
+; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = call nnan <8 x float> @llvm.minnum.v8f32(<8 x float> undef, <8 x float> undef)
+; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F32 = call nnan <16 x float> @llvm.minnum.v16f32(<16 x float> undef, <16 x float> undef)
+; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
; AVX512-LABEL: 'f32_nnan'
-; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = call nnan float @llvm.minnum.f32(float undef, float undef)
-; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = call nnan <2 x float> @llvm.minnum.v2f32(<2 x float> undef, <2 x float> undef)
-; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call nnan <4 x float> @llvm.minnum.v4f32(<4 x float> undef, <4 x float> undef)
-; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = call nnan <8 x float> @llvm.minnum.v8f32(<8 x float> undef, <8 x float> undef)
-; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F32 = call nnan <16 x float> @llvm.minnum.v16f32(<16 x float> undef, <16 x float> undef)
+; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call nnan float @llvm.minnum.f32(float undef, float undef)
+; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F32 = call nnan <2 x float> @llvm.minnum.v2f32(<2 x float> undef, <2 x float> undef)
+; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = call nnan <4 x float> @llvm.minnum.v4f32(<4 x float> undef, <4 x float> undef)
+; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = call nnan <8 x float> @llvm.minnum.v8f32(<8 x float> undef, <8 x float> undef)
+; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = call nnan <16 x float> @llvm.minnum.v16f32(<16 x float> undef, <16 x float> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
%F32 = call nnan float @llvm.minnum.f32(float undef, float undef)
@@ -135,35 +127,27 @@ define i32 @f32_nnan(i32 %arg) {
define i32 @f64_nnan(i32 %arg) {
; SSE-LABEL: 'f64_nnan'
-; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %f64 = call nnan double @llvm.minnum.f64(double undef, double undef)
-; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2f64 = call nnan <2 x double> @llvm.minnum.v2f64(<2 x double> undef, <2 x double> undef)
-; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V4f64 = call nnan <4 x double> @llvm.minnum.v4f64(<4 x double> undef, <4 x double> undef)
-; SSE-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8f64 = call nnan <8 x double> @llvm.minnum.v8f64(<8 x double> undef, <8 x double> undef)
-; SSE-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V16f64 = call nnan <16 x double> @llvm.minnum.v16f64(<16 x double> undef, <16 x double> undef)
+; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f64 = call nnan double @llvm.minnum.f64(double undef, double undef)
+; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2f64 = call nnan <2 x double> @llvm.minnum.v2f64(<2 x double> undef, <2 x double> undef)
+; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4f64 = call nnan <4 x double> @llvm.minnum.v4f64(<4 x double> undef, <4 x double> undef)
+; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8f64 = call nnan <8 x double> @llvm.minnum.v8f64(<8 x double> undef, <8 x double> undef)
+; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16f64 = call nnan <16 x double> @llvm.minnum.v16f64(<16 x double> undef, <16 x double> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
-; AVX1-LABEL: 'f64_nnan'
-; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %f64 = call nnan double @llvm.minnum.f64(double undef, double undef)
-; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2f64 = call nnan <2 x double> @llvm.minnum.v2f64(<2 x double> undef, <2 x double> undef)
-; AVX1-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V4f64 = call nnan <4 x double> @llvm.minnum.v4f64(<4 x double> undef, <4 x double> undef)
-; AVX1-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V8f64 = call nnan <8 x double> @llvm.minnum.v8f64(<8 x double> undef, <8 x double> undef)
-; AVX1-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %V16f64 = call nnan <16 x double> @llvm.minnum.v16f64(<16 x double> undef, <16 x double> undef)
-; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
-;
-; AVX2-LABEL: 'f64_nnan'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %f64 = call nnan double @llvm.minnum.f64(double undef, double undef)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2f64 = call nnan <2 x double> @llvm.minnum.v2f64(<2 x double> undef, <2 x double> undef)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V4f64 = call nnan <4 x double> @llvm.minnum.v4f64(<4 x double> undef, <4 x double> undef)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V8f64 = call nnan <8 x double> @llvm.minnum.v8f64(<8 x double> undef, <8 x double> undef)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V16f64 = call nnan <16 x double> @llvm.minnum.v16f64(<16 x double> undef, <16 x double> undef)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
+; AVX-LABEL: 'f64_nnan'
+; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f64 = call nnan double @llvm.minnum.f64(double undef, double undef)
+; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2f64 = call nnan <2 x double> @llvm.minnum.v2f64(<2 x double> undef, <2 x double> undef)
+; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4f64 = call nnan <4 x double> @llvm.minnum.v4f64(<4 x double> undef, <4 x double> undef)
+; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8f64 = call nnan <8 x double> @llvm.minnum.v8f64(<8 x double> undef, <8 x double> undef)
+; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16f64 = call nnan <16 x double> @llvm.minnum.v16f64(<16 x double> undef, <16 x double> undef)
+; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
; AVX512-LABEL: 'f64_nnan'
-; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f64 = call nnan double @llvm.minnum.f64(double undef, double undef)
-; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2f64 = call nnan <2 x double> @llvm.minnum.v2f64(<2 x double> undef, <2 x double> undef)
-; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4f64 = call nnan <4 x double> @llvm.minnum.v4f64(<4 x double> undef, <4 x double> undef)
-; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8f64 = call nnan <8 x double> @llvm.minnum.v8f64(<8 x double> undef, <8 x double> undef)
-; AVX512-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16f64 = call nnan <16 x double> @llvm.minnum.v16f64(<16 x double> undef, <16 x double> undef)
+; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f64 = call nnan double @llvm.minnum.f64(double undef, double undef)
+; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2f64 = call nnan <2 x double> @llvm.minnum.v2f64(<2 x double> undef, <2 x double> undef)
+; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4f64 = call nnan <4 x double> @llvm.minnum.v4f64(<4 x double> undef, <4 x double> undef)
+; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8f64 = call nnan <8 x double> @llvm.minnum.v8f64(<8 x double> undef, <8 x double> undef)
+; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16f64 = call nnan <16 x double> @llvm.minnum.v16f64(<16 x double> undef, <16 x double> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
%f64 = call nnan double @llvm.minnum.f64(double undef, double undef)
More information about the llvm-branch-commits
mailing list