[llvm-branch-commits] [llvm] 799626b - [NFC][InstCombine] Add PR48343 miscompiled testcase

[Roman Lebedev via llvm-branch-commits]

Author: Roman Lebedev
Date: 2020-12-01T15:13:07+03:00
New Revision: 799626b1117c4cecba7c2c67c1ed7c5f1856fb24

URL: https://github.com/llvm/llvm-project/commit/799626b1117c4cecba7c2c67c1ed7c5f1856fb24
DIFF: https://github.com/llvm/llvm-project/commit/799626b1117c4cecba7c2c67c1ed7c5f1856fb24.diff

LOG: [NFC][InstCombine] Add PR48343 miscompiled testcase

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/sext.ll

Removed: 
    


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diff  --git a/llvm/test/Transforms/InstCombine/sext.ll b/llvm/test/Transforms/InstCombine/sext.ll
index 55f8217e903e..b2feea73b62c 100644
--- a/llvm/test/Transforms/InstCombine/sext.ll
+++ b/llvm/test/Transforms/InstCombine/sext.ll
@@ -279,3 +279,15 @@ define i32 @test18(i16 %x) {
   ret i32 %ext
 }
 
+define i10 @test19(i10 %i) {
+; CHECK-LABEL: @test19(
+; CHECK-NEXT:    [[D1:%.*]] = shl i10 [[I:%.*]], 1
+; CHECK-NEXT:    [[D:%.*]] = ashr exact i10 [[D1]], 1
+; CHECK-NEXT:    ret i10 [[D]]
+;
+  %a = trunc i10 %i to i3
+  %b = shl i3 %a, 2
+  %c = ashr i3 %b, 2
+  %d = sext i3 %c to i10
+  ret i10 %d
+}