[llvm-branch-commits] [compiler-rt] 761cd1c - [X86] Correct the implementation of the testFeature macro in getIntelProcessorTypeAndSubtype to do a proper bit test.

[Hans Wennborg via llvm-branch-commits]

Author: Craig Topper
Date: 2020-08-26T17:24:15+02:00
New Revision: 761cd1ce23769b459d8f111e1448ff1e9807b90e

URL: https://github.com/llvm/llvm-project/commit/761cd1ce23769b459d8f111e1448ff1e9807b90e
DIFF: https://github.com/llvm/llvm-project/commit/761cd1ce23769b459d8f111e1448ff1e9807b90e.diff

LOG: [X86] Correct the implementation of the testFeature macro in getIntelProcessorTypeAndSubtype to do a proper bit test.

Instead of ANDing with a one hot mask representing the bit to
be tested, we were ANDing with just the bit number. This tests
multiple bits none of them the correct one.

This caused skylake-avx512, cascadelake and cooperlake to all
be misdetected. Based on experiments with the Intel SDE, it seems
that all of these CPUs are being detected as being cooperlake.
This is bad since its the newest CPU of the 3.

(cherry picked from commit df9a9bb7beb7bc04ca4188fe0e527baac2900ff1)

Added: 
    

Modified: 
    compiler-rt/lib/builtins/cpu_model.c

Removed: 
    


################################################################################
diff  --git a/compiler-rt/lib/builtins/cpu_model.c b/compiler-rt/lib/builtins/cpu_model.c
index 8346bb62dcfb4..468bcc84cbcb3 100644
--- a/compiler-rt/lib/builtins/cpu_model.c
+++ b/compiler-rt/lib/builtins/cpu_model.c
@@ -277,7 +277,7 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
                                 const unsigned *Features,
                                 unsigned *Type, unsigned *Subtype) {
 #define testFeature(F)                                                         \
-  (Features[F / 32] & (F % 32)) != 0
+  (Features[F / 32] & (1 << (F % 32))) != 0
 
   // We select CPU strings to match the code in Host.cpp, but we don't use them
   // in compiler-rt.