[llvm-branch-commits] [llvm-branch] r354252 - Merging r354144:

[Hans Wennborg via llvm-branch-commits]

Author: hans
Date: Mon Feb 18 02:23:16 2019
New Revision: 354252

URL: http://llvm.org/viewvc/llvm-project?rev=354252&view=rev
Log:
Merging r354144:
------------------------------------------------------------------------
r354144 | spatel | 2019-02-15 17:31:55 +0100 (Fri, 15 Feb 2019) | 3 lines

[InstCombine] fix crash while trying to narrow a binop of shuffles (PR40734)

https://bugs.llvm.org/show_bug.cgi?id=40734
------------------------------------------------------------------------

Modified:
    llvm/branches/release_80/   (props changed)
    llvm/branches/release_80/lib/Transforms/InstCombine/InstructionCombining.cpp
    llvm/branches/release_80/test/Transforms/InstCombine/vec_shuffle.ll

Propchange: llvm/branches/release_80/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Mon Feb 18 02:23:16 2019
@@ -1,3 +1,3 @@
 /llvm/branches/Apple/Pertwee:110850,110961
 /llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,351322,351325,351344-351345,351349,351351,351370,351381,351387,351421,351426,351436,351475,351485,351753-351754,351765,351910,351930,351932,352034,352204,352246,352374,352555,352607-352608,352707,352714,352770,352886,352889,352892,352895,352908,352917,352935,352945,353015,353061,353082,353138,353141,353155,353213,353218,353304,353308,353334,353367,353374,353383,353463,353480,353489,353551,353733,353758,353809,354128,354131
+/llvm/trunk:155241,351322,351325,351344-351345,351349,351351,351370,351381,351387,351421,351426,351436,351475,351485,351753-351754,351765,351910,351930,351932,352034,352204,352246,352374,352555,352607-352608,352707,352714,352770,352886,352889,352892,352895,352908,352917,352935,352945,353015,353061,353082,353138,353141,353155,353213,353218,353304,353308,353334,353367,353374,353383,353463,353480,353489,353551,353733,353758,353809,354128,354131,354144

Modified: llvm/branches/release_80/lib/Transforms/InstCombine/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_80/lib/Transforms/InstCombine/InstructionCombining.cpp?rev=354252&r1=354251&r2=354252&view=diff
==============================================================================
--- llvm/branches/release_80/lib/Transforms/InstCombine/InstructionCombining.cpp (original)
+++ llvm/branches/release_80/lib/Transforms/InstCombine/InstructionCombining.cpp Mon Feb 18 02:23:16 2019
@@ -1376,7 +1376,8 @@ Instruction *InstCombiner::foldVectorBin
   if (match(LHS, m_ShuffleVector(m_Value(L0), m_Value(L1), m_Constant(Mask))) &&
       match(RHS, m_ShuffleVector(m_Value(R0), m_Value(R1), m_Specific(Mask))) &&
       LHS->hasOneUse() && RHS->hasOneUse() &&
-      cast<ShuffleVectorInst>(LHS)->isConcat()) {
+      cast<ShuffleVectorInst>(LHS)->isConcat() &&
+      cast<ShuffleVectorInst>(RHS)->isConcat()) {
     // This transform does not have the speculative execution constraint as
     // below because the shuffle is a concatenation. The new binops are
     // operating on exactly the same elements as the existing binop.

Modified: llvm/branches/release_80/test/Transforms/InstCombine/vec_shuffle.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_80/test/Transforms/InstCombine/vec_shuffle.ll?rev=354252&r1=354251&r2=354252&view=diff
==============================================================================
--- llvm/branches/release_80/test/Transforms/InstCombine/vec_shuffle.ll (original)
+++ llvm/branches/release_80/test/Transforms/InstCombine/vec_shuffle.ll Mon Feb 18 02:23:16 2019
@@ -1114,3 +1114,18 @@ define <2 x float> @frem_splat_constant1
   ret <2 x float> %r
 }
 
+; Equivalent shuffle masks, but only one is a narrowing op.
+
+define <2 x i1> @PR40734(<1 x i1> %x, <4 x i1> %y) {
+; CHECK-LABEL: @PR40734(
+; CHECK-NEXT:    [[WIDEN:%.*]] = shufflevector <1 x i1> zeroinitializer, <1 x i1> [[X:%.*]], <2 x i32> <i32 0, i32 1>
+; CHECK-NEXT:    [[NARROW:%.*]] = shufflevector <4 x i1> [[Y:%.*]], <4 x i1> undef, <2 x i32> <i32 0, i32 1>
+; CHECK-NEXT:    [[R:%.*]] = and <2 x i1> [[WIDEN]], [[NARROW]]
+; CHECK-NEXT:    ret <2 x i1> [[R]]
+;
+  %widen = shufflevector <1 x i1> zeroinitializer, <1 x i1> %x, <2 x i32> <i32 0, i32 1>
+  %narrow = shufflevector <4 x i1> %y, <4 x i1> undef, <2 x i32> <i32 0, i32 1>
+  %r = and <2 x i1> %widen, %narrow
+  ret <2 x i1> %r
+}
+