[llvm-branch-commits] [llvm-branch] r339717 - [ReleaseNotes] Add release notes for Hexagon

Krzysztof Parzyszek via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Tue Aug 14 12:40:56 PDT 2018


Author: kparzysz
Date: Tue Aug 14 12:40:56 2018
New Revision: 339717

URL: http://llvm.org/viewvc/llvm-project?rev=339717&view=rev
Log:
[ReleaseNotes] Add release notes for Hexagon

Modified:
    llvm/branches/release_70/docs/ReleaseNotes.rst

Modified: llvm/branches/release_70/docs/ReleaseNotes.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_70/docs/ReleaseNotes.rst?rev=339717&r1=339716&r2=339717&view=diff
==============================================================================
--- llvm/branches/release_70/docs/ReleaseNotes.rst (original)
+++ llvm/branches/release_70/docs/ReleaseNotes.rst Tue Aug 14 12:40:56 2018
@@ -172,6 +172,18 @@ Changes to the ARM Target
   deduce the instruction size, without having to specify it with
   e.g. ``.inst.w`` as before.
 
+Changes to the Hexagon Target
+-----------------------------
+
+* Hexagon now supports auto-vectorization for HVX. It is disabled by default
+  and can be turned on with ``-fvectorize``. For auto-vectorization to take
+  effect, code genration for HVX needs to be enabled with ``-mhvx``.
+  The complete set of options should include ``-fvectorize``, ``-mhvx``,
+  and ``-mhvx-length={64b|128b}``.
+
+* The support for Hexagon ISA V4 is deprecated and will be removed in the
+  next release.
+
 Changes to the MIPS Target
 --------------------------
 




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