[llvm-branch-commits] [llvm-branch] r311461 - Merging r311061:

[Hans Wennborg via llvm-branch-commits]

Author: hans
Date: Tue Aug 22 09:09:55 2017
New Revision: 311461

URL: http://llvm.org/viewvc/llvm-project?rev=311461&view=rev
Log:
Merging r311061:
------------------------------------------------------------------------
r311061 | compnerd | 2017-08-16 19:42:24 -0700 (Wed, 16 Aug 2017) | 10 lines

ARM: mark CPSR as clobbered for Windows VLAs

When lowering a VLA, we emit a __chstk call.  However, this call can
internally clobber CPSR.  We did not mark this register as an ImpDef,
which could potentially allow a comparison to be hoisted above the call
to `__chkstk`.  In such a case, the CPSR could be clobbered, and the
check invalidated.  When the support was initially added, it seemed that
the call would take care of preventing CPSR from being clobbered, but
this is not the case.  Mark the register as clobbered to fix a possible
state corruption.
------------------------------------------------------------------------

Added:
    llvm/branches/release_50/test/CodeGen/ARM/Windows/vla-cpsr.ll
      - copied unchanged from r311061, llvm/trunk/test/CodeGen/ARM/Windows/vla-cpsr.ll
Modified:
    llvm/branches/release_50/   (props changed)
    llvm/branches/release_50/lib/Target/ARM/ARMISelLowering.cpp

Propchange: llvm/branches/release_50/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Tue Aug 22 09:09:55 2017
@@ -1,3 +1,3 @@
 /llvm/branches/Apple/Pertwee:110850,110961
 /llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,308483-308484,308503,308808,308813,308847,308891,308906,308950,308963,308978,308986,309044,309071,309113,309120,309122,309140,309227,309302,309321,309323,309325,309330,309343,309353,309355,309422,309481,309483,309495,309555,309561,309594,309614,309651,309744,309758,309849,309928,309930,309945,310066,310071,310190,310240-310242,310250,310253,310262,310267,310481,310492,310498,310510,310534,310552,310604,310712,310779,310784,310796,310842,310906,310926,310939,310979,310988,310990-310991,311068,311071,311087,311229,311258
+/llvm/trunk:155241,308483-308484,308503,308808,308813,308847,308891,308906,308950,308963,308978,308986,309044,309071,309113,309120,309122,309140,309227,309302,309321,309323,309325,309330,309343,309353,309355,309422,309481,309483,309495,309555,309561,309594,309614,309651,309744,309758,309849,309928,309930,309945,310066,310071,310190,310240-310242,310250,310253,310262,310267,310481,310492,310498,310510,310534,310552,310604,310712,310779,310784,310796,310842,310906,310926,310939,310979,310988,310990-310991,311061,311068,311071,311087,311229,311258

Modified: llvm/branches/release_50/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_50/lib/Target/ARM/ARMISelLowering.cpp?rev=311461&r1=311460&r2=311461&view=diff
==============================================================================
--- llvm/branches/release_50/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/branches/release_50/lib/Target/ARM/ARMISelLowering.cpp Tue Aug 22 09:09:55 2017
@@ -8805,6 +8805,8 @@ ARMTargetLowering::EmitLowered__chkstk(M
         .addReg(ARM::R4, RegState::Implicit | RegState::Kill)
         .addReg(ARM::R4, RegState::Implicit | RegState::Define)
         .addReg(ARM::R12,
+                RegState::Implicit | RegState::Define | RegState::Dead)
+        .addReg(ARM::CPSR,
                 RegState::Implicit | RegState::Define | RegState::Dead);
     break;
   case CodeModel::Large:
@@ -8820,6 +8822,8 @@ ARMTargetLowering::EmitLowered__chkstk(M
         .addReg(ARM::R4, RegState::Implicit | RegState::Kill)
         .addReg(ARM::R4, RegState::Implicit | RegState::Define)
         .addReg(ARM::R12,
+                RegState::Implicit | RegState::Define | RegState::Dead)
+        .addReg(ARM::CPSR,
                 RegState::Implicit | RegState::Define | RegState::Dead);
     break;
   }