[llvm-branch-commits] [llvm-branch] r270676 - Merging r270542:

Mohit K. Bhakkad via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Tue May 24 23:35:33 PDT 2016 

Author: mohit.bhakkad
Date: Wed May 25 01:32:18 2016
New Revision: 270676

URL: http://llvm.org/viewvc/llvm-project?rev=270676&view=rev
Log:
Merging r270542:
------------------------------------------------------------------------
r270542 | slthakur | 2016-05-24 15:27:10 +0530 (Tue, 24 May 2016) | 9 lines

[MIPS][LLVM-MC] Fix Disassemble of Negative Offset

Patch by Nitesh Jain.

Summary: The type of Imm in MipsDisassembler.cpp was incorrect since SignExtend64 return int64_t type.As per the MIPSr6 doc ,the offset is added to the address of the instruction following the branch (not the branch itself), to form a PC-relative effective target address hence “4” is added to the offset. The offset of some test case are update to reflect the changes due to “ + 4 ” offset and new test case for negative offset are added.

Reviewers: dsanders, vkalintiris
Differential Revision: http://reviews.llvm.org/D17540

------------------------------------------------------------------------

Modified:
    llvm/branches/release_38/   (props changed)
    llvm/branches/release_38/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
    llvm/branches/release_38/test/ExecutionEngine/RuntimeDyld/Mips/ELF_N64R6_relocations.s
    llvm/branches/release_38/test/ExecutionEngine/RuntimeDyld/Mips/ELF_O32R6_relocations.s
    llvm/branches/release_38/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt
    llvm/branches/release_38/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
    llvm/branches/release_38/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
    llvm/branches/release_38/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
    llvm/branches/release_38/test/MC/Disassembler/Mips/mips64r6/valid-xfail-mips64r6.txt

Propchange: llvm/branches/release_38/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Wed May 25 01:32:18 2016
@@ -1,3 +1,3 @@
 /llvm/branches/Apple/Pertwee:110850,110961
 /llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,257645,257648,257730,257775,257791,257864,257875,257886,257902,257905,257925,257929-257930,257940,257942,257977,257979,257997,258103,258112,258168,258184,258207,258221,258273,258325,258406,258416,258428,258436,258471,258609-258611,258616,258690,258729,258891,258971,259177-259178,259228,259236,259342,259346,259375,259381,259645,259649,259695-259696,259702,259740,259798,259835,259840,259886,259888,259958,260164,260390,260427,260587,260641,260703,260733,261033,261039,261258,261306,261360,261365,261368,261384,261387,261441,261447,261546,264335,265134,267634
+/llvm/trunk:155241,257645,257648,257730,257775,257791,257864,257875,257886,257902,257905,257925,257929-257930,257940,257942,257977,257979,257997,258103,258112,258168,258184,258207,258221,258273,258325,258406,258416,258428,258436,258471,258609-258611,258616,258690,258729,258891,258971,259177-259178,259228,259236,259342,259346,259375,259381,259645,259649,259695-259696,259702,259740,259798,259835,259840,259886,259888,259958,260164,260390,260427,260587,260641,260703,260733,261033,261039,261258,261306,261360,261365,261368,261384,261387,261441,261447,261546,264335,265134,267634,270542

Modified: llvm/branches/release_38/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/lib/Target/Mips/Disassembler/MipsDisassembler.cpp?rev=270676&r1=270675&r2=270676&view=diff
==============================================================================
--- llvm/branches/release_38/lib/Target/Mips/Disassembler/MipsDisassembler.cpp (original)
+++ llvm/branches/release_38/lib/Target/Mips/Disassembler/MipsDisassembler.cpp Wed May 25 01:32:18 2016
@@ -563,7 +563,7 @@ static DecodeStatus DecodeAddiGroupBranc
 
   InsnType Rs = fieldFromInstruction(insn, 21, 5);
   InsnType Rt = fieldFromInstruction(insn, 16, 5);
-  InsnType Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4;
+  int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4;
   bool HasRs = false;
 
   if (Rs >= Rt) {
@@ -602,7 +602,7 @@ static DecodeStatus DecodeDaddiGroupBran
 
   InsnType Rs = fieldFromInstruction(insn, 21, 5);
   InsnType Rt = fieldFromInstruction(insn, 16, 5);
-  InsnType Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4;
+  int64_t  Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4;
   bool HasRs = false;
 
   if (Rs >= Rt) {
@@ -642,7 +642,7 @@ static DecodeStatus DecodeBlezlGroupBran
 
   InsnType Rs = fieldFromInstruction(insn, 21, 5);
   InsnType Rt = fieldFromInstruction(insn, 16, 5);
-  InsnType Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4;
+  int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4;
   bool HasRs = false;
 
   if (Rt == 0)
@@ -687,7 +687,7 @@ static DecodeStatus DecodeBgtzlGroupBran
 
   InsnType Rs = fieldFromInstruction(insn, 21, 5);
   InsnType Rt = fieldFromInstruction(insn, 16, 5);
-  InsnType Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4;
+  int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4;
 
   if (Rt == 0)
     return MCDisassembler::Fail;
@@ -729,7 +729,7 @@ static DecodeStatus DecodeBgtzGroupBranc
 
   InsnType Rs = fieldFromInstruction(insn, 21, 5);
   InsnType Rt = fieldFromInstruction(insn, 16, 5);
-  InsnType Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4;
+  int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4;
   bool HasRs = false;
   bool HasRt = false;
 
@@ -778,7 +778,7 @@ static DecodeStatus DecodeBlezGroupBranc
 
   InsnType Rs = fieldFromInstruction(insn, 21, 5);
   InsnType Rt = fieldFromInstruction(insn, 16, 5);
-  InsnType Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4;
+  int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4;
   bool HasRs = false;
 
   if (Rt == 0)
@@ -1822,7 +1822,7 @@ static DecodeStatus DecodeBranchTarget21
                                          unsigned Offset,
                                          uint64_t Address,
                                          const void *Decoder) {
-  int32_t BranchOffset = SignExtend32<21>(Offset) * 4;
+  int32_t BranchOffset = SignExtend32<21>(Offset) * 4 + 4;
 
   Inst.addOperand(MCOperand::createImm(BranchOffset));
   return MCDisassembler::Success;
@@ -1832,7 +1832,7 @@ static DecodeStatus DecodeBranchTarget26
                                          unsigned Offset,
                                          uint64_t Address,
                                          const void *Decoder) {
-  int32_t BranchOffset = SignExtend32<26>(Offset) * 4;
+  int32_t BranchOffset = SignExtend32<26>(Offset) * 4 + 4;
 
   Inst.addOperand(MCOperand::createImm(BranchOffset));
   return MCDisassembler::Success;

Modified: llvm/branches/release_38/test/ExecutionEngine/RuntimeDyld/Mips/ELF_N64R6_relocations.s
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/test/ExecutionEngine/RuntimeDyld/Mips/ELF_N64R6_relocations.s?rev=270676&r1=270675&r2=270676&view=diff
==============================================================================
--- llvm/branches/release_38/test/ExecutionEngine/RuntimeDyld/Mips/ELF_N64R6_relocations.s (original)
+++ llvm/branches/release_38/test/ExecutionEngine/RuntimeDyld/Mips/ELF_N64R6_relocations.s Wed May 25 01:32:18 2016
@@ -32,12 +32,12 @@ R_MIPS_PC19_S2:
 	lwpc $6,foo
 
 # Test R_MIPS_PC21_S2 relocation.
-# rtdyld-check:  decode_operand(R_MIPS_PC21_S2, 1)[22:0] = (foo - next_pc(R_MIPS_PC21_S2))[22:0]
+# rtdyld-check:  decode_operand(R_MIPS_PC21_S2, 1)[22:0] = (foo - next_pc(R_MIPS_PC21_S2) + 0x04)[22:0]
 R_MIPS_PC21_S2:
 	bnezc	$5,foo
 
 # Test R_MIPS_PC26_S2 relocation.
-# rtdyld-check:  decode_operand(R_MIPS_PC26_S2, 0)[27:0] = (foo - next_pc(R_MIPS_PC26_S2))[27:0]
+# rtdyld-check:  decode_operand(R_MIPS_PC26_S2, 0)[27:0] = (foo - next_pc(R_MIPS_PC26_S2) + 0x04)[27:0]
 R_MIPS_PC26_S2:
 	balc	foo
 

Modified: llvm/branches/release_38/test/ExecutionEngine/RuntimeDyld/Mips/ELF_O32R6_relocations.s
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/test/ExecutionEngine/RuntimeDyld/Mips/ELF_O32R6_relocations.s?rev=270676&r1=270675&r2=270676&view=diff
==============================================================================
--- llvm/branches/release_38/test/ExecutionEngine/RuntimeDyld/Mips/ELF_O32R6_relocations.s (original)
+++ llvm/branches/release_38/test/ExecutionEngine/RuntimeDyld/Mips/ELF_O32R6_relocations.s Wed May 25 01:32:18 2016
@@ -27,12 +27,12 @@ R_MIPS_PC19_S2:
 	lwpc $6,foo
 
 # Test R_MIPS_PC21_S2 relocation.
-# rtdyld-check:  decode_operand(R_MIPS_PC21_S2, 1)[22:0] = (foo - next_pc(R_MIPS_PC21_S2))[22:0]
+# rtdyld-check:  decode_operand(R_MIPS_PC21_S2, 1)[22:0] = (foo - next_pc(R_MIPS_PC21_S2) + 0x04)[22:0]
 R_MIPS_PC21_S2:
 	bnezc	$5,foo
 
 # Test R_MIPS_PC26_S2 relocation.
-# rtdyld-check:  decode_operand(R_MIPS_PC26_S2, 0)[27:0] = (foo - next_pc(R_MIPS_PC26_S2))[27:0]
+# rtdyld-check:  decode_operand(R_MIPS_PC26_S2, 0)[27:0] = (foo - next_pc(R_MIPS_PC26_S2) + 0x04)[27:0]
 R_MIPS_PC26_S2:
 	balc	foo
 

Modified: llvm/branches/release_38/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt?rev=270676&r1=270675&r2=270676&view=diff
==============================================================================
--- llvm/branches/release_38/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt (original)
+++ llvm/branches/release_38/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt Wed May 25 01:32:18 2016
@@ -7,8 +7,8 @@
 0xe9 0xff 0x62 0x3c # CHECK: aui $3, $2, -23
 0xff 0xff 0x7e 0xec # CHECK: auipc $3, -1
 0x9b 0x14 0x11 0x04 # CHECK: bal 21104
-0xb8 0x96 0x37 0xe8 # CHECK: balc 14572256
-0xb8 0x96 0x37 0xc8 # CHECK: bc 14572256
+0xb8 0x96 0x37 0xe8 # CHECK: balc 14572260
+0xb8 0x96 0x37 0xc8 # CHECK: bc 14572260
 0x01 0x00 0x20 0x45 # CHECK: bc1eqz $f0, 8
 0x01 0x00 0x3f 0x45 # CHECK: bc1eqz $f31, 8
 0x01 0x00 0xa0 0x45 # CHECK: bc1nez $f0, 8
@@ -17,31 +17,44 @@
 0x02 0x00 0x3f 0x49 # CHECK: bc2eqz $31, 12
 0x02 0x00 0xa0 0x49 # CHECK: bc2nez $0, 12
 0x02 0x00 0xbf 0x49 # CHECK: bc2nez $31, 12
-0x40 0x00 0xa6 0x20 # CHECK: beqc $5, $6, 256
-0x4d 0x01 0x02 0x20 # CHECK: beqzalc $2, 1332
-0x40 0x00 0xa6 0x60 # CHECK: bnec $5, $6, 256
-0x4d 0x01 0x02 0x60 # CHECK: bnezalc $2, 1332
-0x90 0x46 0xa0 0xd8 # CHECK: beqzc $5, 72256
-0x40 0x00 0x43 0x58 # CHECK: bgec $2, $3, 256
-0x40 0x00 0x43 0x18 # CHECK: bgeuc $2, $3, 256
-0x4d 0x01 0x42 0x18 # CHECK: bgezalc $2, 1332
-0x90 0x46 0xa0 0xf8 # CHECK: bnezc $5, 72256
-0x40 0x00 0xa5 0x5c # CHECK: bltzc $5, 256
-0x40 0x00 0xa5 0x58 # CHECK: bgezc $5, 256
-0x4d 0x01 0x02 0x1c # CHECK: bgtzalc $2, 1332
-0x40 0x00 0x05 0x58 # CHECK: blezc $5, 256
-0x4d 0x01 0x42 0x1c # CHECK: bltzalc $2, 1332
-0x40 0x00 0x05 0x5c # CHECK: bgtzc $5, 256
+0x40 0x00 0xa6 0x20 # CHECK: beqc $5, $6, 260
+0x4d 0x01 0x02 0x20 # CHECK: beqzalc $2, 1336
+0x40 0x00 0xa6 0x60 # CHECK: bnec $5, $6, 260
+0xfa 0xff 0x43 0x60 # CHECK: bnec $2, $3, -20
+0x4d 0x01 0x02 0x60 # CHECK: bnezalc $2, 1336
+0x90 0x46 0xa0 0xd8 # CHECK: beqzc $5, 72260
+0x40 0x00 0x43 0x58 # CHECK: bgec $2, $3, 260
+0xfa 0xff 0x43 0x58 # CHECK: bgec $2, $3, -20
+0x40 0x00 0x43 0x18 # CHECK: bgeuc $2, $3, 260
+0xfa 0xff 0x43 0x18 # CHECK: bgeuc $2, $3, -20
+0x4d 0x01 0x42 0x18 # CHECK: bgezalc $2, 1336
+0xfa 0xff 0x42 0x18 # CHECK: bgezalc $2, -20
+0x90 0x46 0xa0 0xf8 # CHECK: bnezc $5, 72260
+0x40 0x00 0xa5 0x5c # CHECK: bltzc $5, 260
+0xfa 0xff 0xa5 0x5c # CHECK: bltzc $5, -20
+0x40 0x00 0xa5 0x58 # CHECK: bgezc $5, 260
+0xfa 0xff 0xa5 0x58 # CHECK: bgezc $5, -20
+0x4d 0x01 0x02 0x1c # CHECK: bgtzalc $2, 1336
+0xfa 0xff 0x02 0x1c # CHECK: bgtzalc $2, -20
+0x40 0x00 0x05 0x58 # CHECK: blezc $5, 260
+0xfa 0xff 0x05 0x58 # CHECK: blezc $5, -20
+0x4d 0x01 0x42 0x1c # CHECK: bltzalc $2, 1336
+0xfa 0xff 0x42 0x1c # CHECK: bltzalc $2, -20
+0x40 0x00 0x05 0x5c # CHECK: bgtzc $5, 260
+0xfa 0xff 0x05 0x5c # CHECK: bgtzc $5, -20
 0x20 0x20 0x02 0x7c # CHECK: bitswap $4, $2
-0x4d 0x01 0x02 0x18 # CHECK: blezalc $2, 1332
-0x40 0x00 0xa6 0x5c # CHECK: bltc $5, $6, 256
-0x40 0x00 0xa6 0x1c # CHECK: bltuc $5, $6, 256
-0x01 0x00 0x00 0x60 # CHECK: bnvc $zero, $zero, 4
-0x01 0x00 0x40 0x60 # CHECK: bnvc $2, $zero, 4
-0x01 0x00 0x82 0x60 # CHECK: bnvc $4, $2, 4
-0x01 0x00 0x00 0x20 # CHECK: bovc $zero, $zero, 4
-0x01 0x00 0x40 0x20 # CHECK: bovc $2, $zero, 4
-0x01 0x00 0x82 0x20 # CHECK: bovc $4, $2, 4
+0x4d 0x01 0x02 0x18 # CHECK: blezalc $2, 1336
+0xfa 0xff 0x02 0x18 # CHECK: blezalc $2, -20
+0x40 0x00 0xa6 0x5c # CHECK: bltc $5, $6, 260
+0xfa 0xff 0xa6 0x5c # CHECK: bltc $5, $6, -20
+0x40 0x00 0xa6 0x1c # CHECK: bltuc $5, $6, 260
+0xfa 0xff 0xa6 0x1c # CHECK: bltuc $5, $6, -20
+0x01 0x00 0x00 0x60 # CHECK: bnvc $zero, $zero, 8 
+0x01 0x00 0x40 0x60 # CHECK: bnvc $2, $zero, 8
+0x01 0x00 0x82 0x60 # CHECK: bnvc $4, $2, 8
+0x01 0x00 0x00 0x20 # CHECK: bovc $zero, $zero, 8
+0x01 0x00 0x40 0x20 # CHECK: bovc $2, $zero, 8
+0x01 0x00 0x82 0x20 # CHECK: bovc $4, $2, 8
 0x80 0x18 0x84 0x46 # CHECK: cmp.af.s $f2, $f3, $f4
 0x80 0x18 0xa4 0x46 # CHECK: cmp.af.d $f2, $f3, $f4
 0x81 0x18 0x84 0x46 # CHECK: cmp.un.s $f2, $f3, $f4

Modified: llvm/branches/release_38/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt?rev=270676&r1=270675&r2=270676&view=diff
==============================================================================
--- llvm/branches/release_38/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt (original)
+++ llvm/branches/release_38/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt Wed May 25 01:32:18 2016
@@ -33,22 +33,28 @@
 0x02 0xdc 0x00 0x31 # CHECK: tgeu $22, $gp
 0x03 0x80 0xe8 0x50 # CHECK: clz $sp, $gp
 0x04 0x11 0x14 0x9b # CHECK: bal 21104
-# FIXME: The encode/decode functions are not inverses of each other.
-0x18 0x02 0x01 0x4d # CHECK: blezalc $2, 1332
-# FIXME: The encode/decode functions are not inverses of each other.
-0x18 0x42 0x01 0x4d # CHECK: bgezalc $2, 1332
-0x18 0x43 0x00 0x40 # CHECK: bgeuc $2, $3, 256
-# FIXME: The encode/decode functions are not inverses of each other.
-0x1c 0x02 0x01 0x4d # CHECK: bgtzalc $2, 1332
-# FIXME: The encode/decode functions are not inverses of each other.
-0x1c 0x42 0x01 0x4d # CHECK: bltzalc $2, 1332
-0x1c 0xa6 0x00 0x40 # CHECK: bltuc $5, $6, 256
-0x20 0x00 0x00 0x01 # CHECK: bovc $zero, $zero, 4
-# FIXME: The encode/decode functions are not inverses of each other.
-0x20 0x02 0x01 0x4d # CHECK: beqzalc $2, 1332
-0x20 0x40 0x00 0x01 # CHECK: bovc $2, $zero, 4
-0x20 0x82 0x00 0x01 # CHECK: bovc $4, $2, 4
-0x20 0xa6 0x00 0x40 # CHECK: beqc $5, $6, 256
+# The encode/decode functions are not inverses of each other.
+0x18 0x02 0x01 0x4d # CHECK: blezalc $2, 1336
+0x18 0x02 0xff 0xfa # CHECk: blezalc $2, -20
+# The encode/decode functions are not inverses of each other in the immediate case.
+0x18 0x42 0x01 0x4d # CHECK: bgezalc $2, 1336
+0x18 0x42 0xff 0xfa # CHECK: bgezalc $2, -20
+0x18 0x43 0x00 0x40 # CHECK: bgeuc $2, $3, 260
+0x18 0x43 0xff 0xfa # CHECK: bgeuc $2, $3, -20
+# The encode/decode functions are not inverses of each other in the immediate case.
+0x1c 0x02 0x01 0x4d # CHECK: bgtzalc $2, 1336
+0x1c 0x02 0xff 0xfa # CHECK: bgtzalc $2, -20
+# The encode/decode functions are not inverses of each other in the immediate case.
+0x1c 0x42 0x01 0x4d # CHECK: bltzalc $2, 1336
+0x1c 0x42 0xff 0xfa # CHECK: bltzalc $2, -20
+0x1c 0xa6 0x00 0x40 # CHECK: bltuc $5, $6, 260
+0x1c 0xa6 0xff 0xfa # CHECK: bltuc $5, $6, -20
+0x20 0x00 0x00 0x01 # CHECK: bovc $zero, $zero, 8
+# The encode/decode functions are not inverses of each other in the immediate case.
+0x20 0x02 0x01 0x4d # CHECK: beqzalc $2, 1336
+0x20 0x40 0x00 0x01 # CHECK: bovc $2, $zero, 8
+0x20 0x82 0x00 0x01 # CHECK: bovc $4, $2, 8
+0x20 0xa6 0x00 0x40 # CHECK: beqc $5, $6, 260
 0x25 0x29 0x00 0x0a # CHECK: addiu $9, $9, 10
 0x30 0x42 0x00 0x04 # CHECK: andi $2, $2, 4
 0x34 0x42 0x00 0x04 # CHECK: ori $2, $2, 4
@@ -143,32 +149,41 @@
 0x49 0xbf 0x00 0x02 # CHECK: bc2nez $31, 12
 0x49 0xc8 0x0d 0x43 # CHECK: ldc2 $8, -701($1)
 0x49 0xf4 0x92 0x75 # CHECK: sdc2 $20, 629($18)
-0x58 0x05 0x00 0x40 # CHECK: blezc $5, 256
-0x58 0x43 0x00 0x40 # CHECK: bgec $2, $3, 256
-0x58 0xa5 0x00 0x40 # CHECK: bgezc $5, 256
-0x5c 0x05 0x00 0x40 # CHECK: bgtzc $5, 256
-0x5c 0xa5 0x00 0x40 # CHECK: bltzc $5, 256
-0x5c 0xa6 0x00 0x40 # CHECK: bltc $5, $6, 256
-0x60 0x00 0x00 0x01 # CHECK: bnvc $zero, $zero, 4
-# FIXME: The encode/decode functions are not inverses of each other.
-0x60 0x02 0x01 0x4d # CHECK: bnezalc $2, 1332
-0x60 0x40 0x00 0x01 # CHECK: bnvc $2, $zero, 4
-0x60 0x82 0x00 0x01 # CHECK: bnvc $4, $2, 4
-0x60 0xa6 0x00 0x40 # CHECK: bnec $5, $6, 256
+0x58 0x05 0x00 0x40 # CHECK: blezc $5, 260
+0x58 0x05 0xff 0xfa # CHECk: blezc $5, -20
+0x58 0x43 0x00 0x40 # CHECK: bgec $2, $3, 260
+0x58 0x43 0xff 0xfa # CHECK: bgec $2, $3, -20
+0x58 0xa5 0x00 0x40 # CHECK: bgezc $5, 260
+0x58 0xa5 0xff 0xfa # CHECK: bgezc $5, -20
+0x5c 0x05 0x00 0x40 # CHECK: bgtzc $5, 260
+0x5c 0x05 0xff 0xfa # CHECk: bgtzc $5, -20
+0x5c 0xa5 0x00 0x40 # CHECK: bltzc $5, 260
+0x5c 0xa5 0xff 0xfa # CHECK: bltzc $5, -20
+0x5c 0xa6 0x00 0x40 # CHECK: bltc $5, $6, 260
+0x5c 0xa6 0xff 0xfa # CHECK: bltc $5, $6, -20
+0x60 0x00 0x00 0x01 # CHECK: bnvc $zero, $zero, 8
+# The encode/decode functions are not inverses of each other in the immediate case.
+0x60 0x02 0x01 0x4d # CHECK: bnezalc $2, 1336
+0x60 0x40 0x00 0x01 # CHECK: bnvc $2, $zero, 8
+0x60 0x82 0x00 0x01 # CHECK: bnvc $4, $2, 8
+0x60 0xa6 0x00 0x40 # CHECK: bnec $5, $6, 260
+0x60 0x43 0xff 0xfa # CHECK: bnec $2, $3, -20
 0x7c 0x02 0x20 0x20 # CHECK: bitswap $4, $2
 0x7c 0x43 0x22 0xa0 # CHECK: align $4, $2, $3, 2
 0x7c 0xa1 0x04 0x25 # CHECK: cache 1, 8($5)
 0x7c 0xa1 0x04 0x35 # CHECK: pref 1, 8($5)
 0x7e 0x42 0xb3 0xb6 # CHECK: ll $2, -153($18)
 0x7e 0x6f 0xec 0x26 # CHECK: sc $15, -40($19)
-0xc8 0x37 0x96 0xb8 # CHECK: bc 14572256
+0xc8 0x37 0x96 0xb8 # CHECK: bc 14572260
 0xd8 0x05 0x01 0x00 # CHECK: jic $5, 256
-0xd8 0xa0 0x46 0x90 # CHECK: beqzc $5, 72256
-0xe8 0x37 0x96 0xb8 # CHECK: balc 14572256
+0xd8 0xa0 0x46 0x90 # CHECK: beqzc $5, 72260
+0xd8 0x5f 0xff 0xfa # CHECK: beqzc $2, -20
+0xe8 0x37 0x96 0xb8 # CHECK: balc 14572260
 0xec 0x48 0x00 0x43 # CHECK: lwpc $2, 268
 0xec 0x50 0x00 0x43 # CHECK: lwupc $2, 268
 0xec 0x7e 0xff 0xff # CHECK: auipc $3, -1
 0xec 0x7f 0x00 0x38 # CHECK: aluipc $3, 56
 0xec 0x80 0x00 0x19 # CHECK: addiupc $4, 100
 0xf8 0x05 0x01 0x00 # CHECK: jialc $5, 256
-0xf8 0xa0 0x46 0x90 # CHECK: bnezc $5, 72256
+0xf8 0xa0 0x46 0x90 # CHECK: bnezc $5, 72260
+0xf8 0x5f 0xff 0xfa # CHECK: bnezc $2, -20

Modified: llvm/branches/release_38/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt?rev=270676&r1=270675&r2=270676&view=diff
==============================================================================
--- llvm/branches/release_38/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt (original)
+++ llvm/branches/release_38/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt Wed May 25 01:32:18 2016
@@ -7,8 +7,8 @@
 0xe9 0xff 0x62 0x3c # CHECK: aui $3, $2, -23
 0xff 0xff 0x7e 0xec # CHECK: auipc $3, -1
 0x9b 0x14 0x11 0x04 # CHECK: bal 21104
-0xb8 0x96 0x37 0xe8 # CHECK: balc 14572256
-0xb8 0x96 0x37 0xc8 # CHECK: bc 14572256
+0xb8 0x96 0x37 0xe8 # CHECK: balc 14572260
+0xb8 0x96 0x37 0xc8 # CHECK: bc 14572260
 0x01 0x00 0x20 0x45 # CHECK: bc1eqz $f0, 8
 0x01 0x00 0x3f 0x45 # CHECK: bc1eqz $f31, 8
 0x01 0x00 0xa0 0x45 # CHECK: bc1nez $f0, 8
@@ -17,31 +17,46 @@
 0x02 0x00 0x3f 0x49 # CHECK: bc2eqz $31, 12
 0x02 0x00 0xa0 0x49 # CHECK: bc2nez $0, 12
 0x02 0x00 0xbf 0x49 # CHECK: bc2nez $31, 12
-0x40 0x00 0xa6 0x20 # CHECK: beqc $5, $6, 256
-0x4d 0x01 0x02 0x20 # CHECK: beqzalc $2, 1332
-0x90 0x46 0xa0 0xd8 # CHECK: beqzc $5, 72256
-0x40 0x00 0x43 0x58 # CHECK: bgec $2, $3, 256
-0x40 0x00 0x43 0x18 # CHECK: bgeuc $2, $3, 256
-0x4d 0x01 0x42 0x18 # CHECK: bgezalc $2, 1332
-0x40 0x00 0xa5 0x58 # CHECK: bgezc $5, 256
-0x4d 0x01 0x02 0x1c # CHECK: bgtzalc $2, 1332
-0x40 0x00 0x05 0x5c # CHECK: bgtzc $5, 256
+0x40 0x00 0xa6 0x20 # CHECK: beqc $5, $6, 260
+0x4d 0x01 0x02 0x20 # CHECK: beqzalc $2, 1336
+0x90 0x46 0xa0 0xd8 # CHECK: beqzc $5, 72260
+0xfa 0xff 0x5f 0xd8 # CHECK: beqzc $2, -20
+0x40 0x00 0x43 0x58 # CHECK: bgec $2, $3, 260
+0xfa 0xff 0x43 0x58 # CHECK: bgec $2, $3, -20
+0x40 0x00 0x43 0x18 # CHECK: bgeuc $2, $3, 260
+0xfa 0xff 0x43 0x18 # CHECK: bgeuc $2, $3, -20
+0x4d 0x01 0x42 0x18 # CHECK: bgezalc $2, 1336
+0xfa 0xff 0x42 0x18 # CHECK: bgezalc $2, -20
+0x40 0x00 0xa5 0x58 # CHECK: bgezc $5, 260
+0xfa 0xff 0xa5 0x58 # CHECK: bgezc $5, -20
+0x4d 0x01 0x02 0x1c # CHECK: bgtzalc $2, 1336
+0xfa 0xff 0x02 0x1c # CHECK: bgtzalc $2, -20
+0x40 0x00 0x05 0x5c # CHECK: bgtzc $5, 260
+0xfa 0xff 0x05 0x5c # CHECK: bgtzc $5, -20
 0x20 0x20 0x02 0x7c # CHECK: bitswap $4, $2
-0x4d 0x01 0x02 0x18 # CHECK: blezalc $2, 1332
-0x40 0x00 0x05 0x58 # CHECK: blezc $5, 256
-0x40 0x00 0xa6 0x5c # CHECK: bltc $5, $6, 256
-0x40 0x00 0xa6 0x1c # CHECK: bltuc $5, $6, 256
-0x4d 0x01 0x42 0x1c # CHECK: bltzalc $2, 1332
-0x40 0x00 0xa5 0x5c # CHECK: bltzc $5, 256
-0x40 0x00 0xa6 0x60 # CHECK: bnec $5, $6, 256
-0x4d 0x01 0x02 0x60 # CHECK: bnezalc $2, 1332
-0x90 0x46 0xa0 0xf8 # CHECK: bnezc $5, 72256
-0x01 0x00 0x40 0x60 # CHECK: bnvc $2, $zero, 4
-0x01 0x00 0x82 0x60 # CHECK: bnvc $4, $2, 4
-0x01 0x00 0x00 0x60 # CHECK: bnvc $zero, $zero, 4
-0x01 0x00 0x40 0x20 # CHECK: bovc $2, $zero, 4
-0x01 0x00 0x82 0x20 # CHECK: bovc $4, $2, 4
-0x01 0x00 0x00 0x20 # CHECK: bovc $zero, $zero, 4
+0x4d 0x01 0x02 0x18 # CHECK: blezalc $2, 1336
+0xfa 0xff 0x02 0x18 # CHECK: blezalc $2, -20
+0x40 0x00 0x05 0x58 # CHECK: blezc $5, 260
+0xfa 0xff 0x05 0x58 # CHECK: blezc $5, -20
+0x40 0x00 0xa6 0x5c # CHECK: bltc $5, $6, 260
+0xfa 0xff 0xa6 0x5c # CHECK: bltc $5, $6, -20
+0x40 0x00 0xa6 0x1c # CHECK: bltuc $5, $6, 260
+0xfa 0xff 0xa6 0x1c # CHECK: bltuc $5, $6, -20
+0x4d 0x01 0x42 0x1c # CHECK: bltzalc $2, 1336
+0xfa 0xff 0x42 0x1c # CHECK: bltzalc $2, -20
+0x40 0x00 0xa5 0x5c # CHECK: bltzc $5, 260
+0xfa 0xff 0xa5 0x5c # CHECK: bltzc $5, -20
+0x40 0x00 0xa6 0x60 # CHECK: bnec $5, $6, 260
+0xfa 0xff 0x43 0x60 # CHECK: bnec $2, $3, -20
+0x4d 0x01 0x02 0x60 # CHECK: bnezalc $2, 1336
+0x90 0x46 0xa0 0xf8 # CHECK: bnezc $5, 72260
+0xfa 0xff 0x5f 0xf8 # CHECK: bnezc $2, -20
+0x01 0x00 0x40 0x60 # CHECK: bnvc $2, $zero, 8
+0x01 0x00 0x82 0x60 # CHECK: bnvc $4, $2, 8 
+0x01 0x00 0x00 0x60 # CHECK: bnvc $zero, $zero, 8
+0x01 0x00 0x40 0x20 # CHECK: bovc $2, $zero, 8
+0x01 0x00 0x82 0x20 # CHECK: bovc $4, $2, 8
+0x01 0x00 0x00 0x20 # CHECK: bovc $zero, $zero, 8
 0x25 0x04 0xa1 0x7c # CHECK: cache 1, 8($5)
 0x9b 0x20 0x20 0x46 # CHECK: class.d $f2, $f4
 0x9b 0x20 0x00 0x46 # CHECK: class.s $f2, $f4

Modified: llvm/branches/release_38/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt?rev=270676&r1=270675&r2=270676&view=diff
==============================================================================
--- llvm/branches/release_38/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt (original)
+++ llvm/branches/release_38/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt Wed May 25 01:32:18 2016
@@ -50,22 +50,28 @@
 0x04 0x11 0x14 0x9b # CHECK: bal 21104
 0x04 0x66 0x56 0x78 # CHECK: dahi $3, 22136
 0x04 0x7e 0xab 0xcd # CHECK: dati $3, -21555
-# FIXME: The encode/decode functions are not inverses of each other.
-0x18 0x02 0x01 0x4d # CHECK: blezalc $2, 1332
-# FIXME: The encode/decode functions are not inverses of each other.
-0x18 0x42 0x01 0x4d # CHECK: bgezalc $2, 1332
-0x18 0x43 0x00 0x40 # CHECK: bgeuc $2, $3, 256
-# FIXME: The encode/decode functions are not inverses of each other.
-0x1c 0x02 0x01 0x4d # CHECK: bgtzalc $2, 1332
-# FIXME: The encode/decode functions are not inverses of each other.
-0x1c 0x42 0x01 0x4d # CHECK: bltzalc $2, 1332
-0x1c 0xa6 0x00 0x40 # CHECK: bltuc $5, $6, 256
-0x20 0x00 0x00 0x01 # CHECK: bovc $zero, $zero, 4
-# FIXME: The encode/decode functions are not inverses of each other.
-0x20 0x02 0x01 0x4d # CHECK: beqzalc $2, 1332
-0x20 0x40 0x00 0x01 # CHECK: bovc $2, $zero, 4
-0x20 0x82 0x00 0x01 # CHECK: bovc $4, $2, 4
-0x20 0xa6 0x00 0x40 # CHECK: beqc $5, $6, 256
+# The encode/decode functions are not inverses of each other in the immediate case.
+0x18 0x02 0x01 0x4d # CHECK: blezalc $2, 1336
+0x18 0x02 0xff 0xfa # CHECk: blezalc $2, -20
+# The encode/decode functions are not inverses of each other in the immediate case.
+0x18 0x42 0x01 0x4d # CHECK: bgezalc $2, 1336
+0x18 0x42 0xff 0xfa # CHECK: bgezalc $2, -20
+0x18 0x43 0x00 0x40 # CHECK: bgeuc $2, $3, 260
+0x18 0x43 0xff 0xfa # CHECK: bgeuc $2, $3, -20
+# The encode/decode functions are not inverses of each other in the immediate case.
+0x1c 0x02 0x01 0x4d # CHECK: bgtzalc $2, 1336
+0x1c 0x02 0xff 0xfa # CHECK: bgtzalc $2, -20
+# The encode/decode functions are not inverses of each other in the immediate case.
+0x1c 0x42 0x01 0x4d # CHECK: bltzalc $2, 1336
+0x1c 0x42 0xff 0xfa # CHECK: bltzalc $2, -20
+0x1c 0xa6 0x00 0x40 # CHECK: bltuc $5, $6, 260
+0x1c 0xa6 0xff 0xfa # CHECK: bltuc $5, $6, -20
+0x20 0x00 0x00 0x01 # CHECK: bovc $zero, $zero, 8
+# The encode/decode functions are not inverses of each other in the immediate case.
+0x20 0x02 0x01 0x4d # CHECK: beqzalc $2, 1336
+0x20 0x40 0x00 0x01 # CHECK: bovc $2, $zero, 8
+0x20 0x82 0x00 0x01 # CHECK: bovc $4, $2, 8
+0x20 0xa6 0x00 0x40 # CHECK: beqc $5, $6, 260
 0x25 0x29 0x00 0x0a # CHECK: addiu $9, $9, 10
 0x30 0x42 0x00 0x04 # CHECK: andi $2, $2, 4
 0x34 0x42 0x00 0x04 # CHECK: ori $2, $2, 4
@@ -162,18 +168,25 @@
 0x49 0xbf 0x00 0x02 # CHECK: bc2nez $31, 12
 0x49 0xc8 0x0d 0x43 # CHECK: ldc2 $8, -701($1)
 0x49 0xf4 0x92 0x75 # CHECK: sdc2 $20, 629($18)
-0x58 0x05 0x00 0x40 # CHECK: blezc $5, 256
-0x58 0x43 0x00 0x40 # CHECK: bgec $2, $3, 256
-0x58 0xa5 0x00 0x40 # CHECK: bgezc $5, 256
-0x5c 0x05 0x00 0x40 # CHECK: bgtzc $5, 256
-0x5c 0xa5 0x00 0x40 # CHECK: bltzc $5, 256
-0x5c 0xa6 0x00 0x40 # CHECK: bltc $5, $6, 256
-0x60 0x00 0x00 0x01 # CHECK: bnvc $zero, $zero, 4
-# FIXME: The encode/decode functions are not inverses of each other.
-0x60 0x02 0x01 0x4d # CHECK: bnezalc $2, 1332
-0x60 0x40 0x00 0x01 # CHECK: bnvc $2, $zero, 4
-0x60 0x82 0x00 0x01 # CHECK: bnvc $4, $2, 4
-0x60 0xa6 0x00 0x40 # CHECK: bnec $5, $6, 256
+0x58 0x05 0x00 0x40 # CHECK: blezc $5, 260
+0x58 0x05 0xff 0xfa # CHECk: blezc $5, -20
+0x58 0x43 0x00 0x40 # CHECK: bgec $2, $3, 260
+0x58 0x43 0xff 0xfa # CHECK: bgec $2, $3, -20
+0x58 0xa5 0x00 0x40 # CHECK: bgezc $5, 260
+0x58 0xa5 0xff 0xfa # CHECK: bgezc $5, -20
+0x5c 0x05 0x00 0x40 # CHECK: bgtzc $5, 260
+0x5c 0x05 0xff 0xfa # CHECk: bgtzc $5, -20
+0x5c 0xa5 0x00 0x40 # CHECK: bltzc $5, 260
+0x5c 0xa5 0xff 0xfa # CHECK: bltzc $5, -20
+0x5c 0xa6 0x00 0x40 # CHECK: bltc $5, $6, 260
+0x5c 0xa6 0xff 0xfa # CHECK: bltc $5, $6, -20
+0x60 0x00 0x00 0x01 # CHECK: bnvc $zero, $zero, 8 
+# The encode/decode functions are not inverses of each other in the immediate case.
+0x60 0x02 0x01 0x4d # CHECK: bnezalc $2, 1336
+0x60 0x40 0x00 0x01 # CHECK: bnvc $2, $zero, 8
+0x60 0x82 0x00 0x01 # CHECK: bnvc $4, $2, 8
+0x60 0xa6 0x00 0x40 # CHECK: bnec $5, $6, 260
+0x60 0x43 0xff 0xfa # CHECK: bnec $2, $3, -20
 0x74 0x62 0x12 0x34 # CHECK: daui $3, $2, 4660
 0x7c 0x02 0x20 0x20 # CHECK: bitswap $4, $2
 0x7c 0x02 0x20 0x24 # CHECK: dbitswap $4, $2
@@ -185,10 +198,11 @@
 0x7e 0x6f 0xec 0x26 # CHECK: sc $15, -40($19)
 0x7f 0xaf 0xe6 0xa7 # CHECK: scd $15, -51($sp)
 0x7f 0xe0 0x38 0x37 # CHECK: lld $zero, 112($ra)
-0xc8 0x37 0x96 0xb8 # CHECK: bc 14572256
+0xc8 0x37 0x96 0xb8 # CHECK: bc 14572260
 0xd8 0x05 0x01 0x00 # CHECK: jic $5, 256
-0xd8 0xa0 0x46 0x90 # CHECK: beqzc $5, 72256
-0xe8 0x37 0x96 0xb8 # CHECK: balc 14572256
+0xd8 0xa0 0x46 0x90 # CHECK: beqzc $5, 72260
+0xd8 0x5f 0xff 0xfa # CHECK: beqzc $2, -20
+0xe8 0x37 0x96 0xb8 # CHECK: balc 14572260
 0xec 0x48 0x00 0x43 # CHECK: lwpc $2, 268
 0xec 0x50 0x00 0x43 # CHECK: lwupc $2, 268
 0xec 0x58 0x3c 0x48 # CHECK: ldpc $2, 123456
@@ -196,4 +210,5 @@
 0xec 0x7f 0x00 0x38 # CHECK: aluipc $3, 56
 0xec 0x80 0x00 0x19 # CHECK: addiupc $4, 100
 0xf8 0x05 0x01 0x00 # CHECK: jialc $5, 256
-0xf8 0xa0 0x46 0x90 # CHECK: bnezc $5, 72256
+0xf8 0xa0 0x46 0x90 # CHECK: bnezc $5, 72260
+0xf8 0x5f 0xff 0xfa # CHECK: bnezc $2, -20

Modified: llvm/branches/release_38/test/MC/Disassembler/Mips/mips64r6/valid-xfail-mips64r6.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/test/MC/Disassembler/Mips/mips64r6/valid-xfail-mips64r6.txt?rev=270676&r1=270675&r2=270676&view=diff
==============================================================================
--- llvm/branches/release_38/test/MC/Disassembler/Mips/mips64r6/valid-xfail-mips64r6.txt (original)
+++ llvm/branches/release_38/test/MC/Disassembler/Mips/mips64r6/valid-xfail-mips64r6.txt Wed May 25 01:32:18 2016
@@ -3,16 +3,16 @@
 #
 # RUN: llvm-mc %s -disassemble -triple=mips-unknown-linux -mcpu=mips64r6 | FileCheck %s
 # XFAIL: *
-0x20 0x40 0x00 0x01 # CHECK: bovc $0, $2, 4
-0x20 0x82 0x00 0x01 # CHECK: bovc $2, $4, 4
-0x60 0x40 0x00 0x01 # CHECK: bnvc $0, $2, 4
-0x60 0x82 0x00 0x01 # CHECK: bnvc $2, $4, 4
-0x20 0xc0 0x00 0x40 # CHECK: beqc $6, $zero, 256
-0x20 0xa0 0x00 0x40 # CHECK: beqc $5, $zero, 256
-0x20 0xa6 0x00 0x40 # CHECK: beqc $5, $6, 256
-0x60 0xc0 0x00 0x40 # CHECK: bnec $6, $zero, 256
-0x60 0xa0 0x00 0x40 # CHECK: bnec $5, $zero, 256
-0x60 0xa6 0x00 0x40 # CHECK: bnec $5, $6, 256
+0x20 0x40 0x00 0x01 # CHECK: bovc $0, $2, 8
+0x20 0x82 0x00 0x01 # CHECK: bovc $2, $4, 8
+0x60 0x40 0x00 0x01 # CHECK: bnvc $0, $2, 8
+0x60 0x82 0x00 0x01 # CHECK: bnvc $2, $4, 8
+0x20 0xc0 0x00 0x40 # CHECK: beqc $6, $zero, 260
+0x20 0xa0 0x00 0x40 # CHECK: beqc $5, $zero, 260
+0x20 0xa6 0x00 0x40 # CHECK: beqc $5, $6, 260
+0x60 0xc0 0x00 0x40 # CHECK: bnec $6, $zero, 260
+0x60 0xa0 0x00 0x40 # CHECK: bnec $5, $zero, 260
+0x60 0xa6 0x00 0x40 # CHECK: bnec $5, $6, 260
 0x64 0x58 0x46 0x9f # CHECK: daddiu $24, $2, 18079
 0x66 0x73 0x69 0x3f # CHECK: daddiu $19, $19, 26943
 0x65 0x6f 0xec 0x5f # CHECK: daddiu $15, $11, -5025

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