[llvm-branch-commits] [llvm-branch] r245573 - Merging r245530:

Hans Wennborg via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Thu Aug 20 09:03:44 PDT 2015


Author: hans
Date: Thu Aug 20 11:03:44 2015
New Revision: 245573

URL: http://llvm.org/viewvc/llvm-project?rev=245573&view=rev
Log:
Merging r245530:
------------------------------------------------------------------------
r245530 | hfinkel | 2015-08-19 18:18:20 -0700 (Wed, 19 Aug 2015) | 5 lines

[PowerPC] Fix the int2fp(fp2int(x)) DAGCombine to ignore ppc_fp128

This DAGCombine was creating custom SDAG nodes with an illegal ppc_fp128
operand type because it was triggering on f64/f32 int2fp(fp2int(ppc_fp128 x)),
but shouldn't (it should only apply to f32/f64 types). The result was a crash.
------------------------------------------------------------------------

Added:
    llvm/branches/release_37/test/CodeGen/PowerPC/fp2int2fp-ppcfp128.ll
      - copied unchanged from r245530, llvm/trunk/test/CodeGen/PowerPC/fp2int2fp-ppcfp128.ll
Modified:
    llvm/branches/release_37/   (props changed)
    llvm/branches/release_37/lib/Target/PowerPC/PPCISelLowering.cpp

Propchange: llvm/branches/release_37/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Thu Aug 20 11:03:44 2015
@@ -1,3 +1,3 @@
 /llvm/branches/Apple/Pertwee:110850,110961
 /llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,242236,242239,242281,242288,242296,242331,242341,242410,242412,242433-242434,242442,242543,242673,242680,242706,242721-242722,242733-242735,242742,242869,242919,242993,243001,243057,243116,243263,243294,243361,243469,243485,243500,243519,243531,243589,243609,243636,243638-243640,243745,243891,243898,243927,243932,243934,243984,243986,243999,244058,244123,244232,244332,244418,244448,244554,244644,244659,244676,244789,244889,245064,245105,245119,245256,245355,245365,245369,245394-245395
+/llvm/trunk:155241,242236,242239,242281,242288,242296,242331,242341,242410,242412,242433-242434,242442,242543,242673,242680,242706,242721-242722,242733-242735,242742,242869,242919,242993,243001,243057,243116,243263,243294,243361,243469,243485,243500,243519,243531,243589,243609,243636,243638-243640,243745,243891,243898,243927,243932,243934,243984,243986,243999,244058,244123,244232,244332,244418,244448,244554,244644,244659,244676,244789,244889,245064,245105,245119,245256,245355,245365,245369,245394-245395,245530

Modified: llvm/branches/release_37/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_37/lib/Target/PowerPC/PPCISelLowering.cpp?rev=245573&r1=245572&r2=245573&view=diff
==============================================================================
--- llvm/branches/release_37/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/branches/release_37/lib/Target/PowerPC/PPCISelLowering.cpp Thu Aug 20 11:03:44 2015
@@ -9966,6 +9966,9 @@ SDValue PPCTargetLowering::combineFPToIn
     if (Src.getValueType() == MVT::f32) {
       Src = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Src);
       DCI.AddToWorklist(Src.getNode());
+    } else if (Src.getValueType() != MVT::f64) {
+      // Make sure that we don't pick up a ppc_fp128 source value.
+      return SDValue();
     }
 
     unsigned FCTOp =




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