[llvm-branch-commits] [llvm-branch] r244909 - Merging r244889:
Hans Wennborg via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Thu Aug 13 09:38:57 PDT 2015
Author: hans
Date: Thu Aug 13 11:38:56 2015
New Revision: 244909
URL: http://llvm.org/viewvc/llvm-project?rev=244909&view=rev
Log:
Merging r244889:
------------------------------------------------------------------------
r244889 | uweigand | 2015-08-13 06:37:06 -0700 (Thu, 13 Aug 2015) | 22 lines
[SystemZ] Support large LLVM IR struct return values
Recent mesa/llvmpipe crashes on SystemZ due to a failed assertion when
attempting to compile a routine with a return type of
{ <4 x float>, <4 x float>, <4 x float>, <4 x float> }
on a system without vector instruction support.
This is because after legalizing the vector type, we get a return value
consisting of 16 floats, which cannot all be returned in registers.
Usually, what should happen in this case is that the target's CanLowerReturn
routine rejects the return type, in which case SelectionDAG falls back to
implementing a structure return in memory via implicit reference.
However, the SystemZ target never actually implemented any CanLowerReturn
routine, and thus would accept any struct return type.
This patch fixes the crash by implementing CanLowerReturn. As a side effect,
this also handles fp128 return values, fixing a todo that was noted in
SystemZCallingConv.td.
------------------------------------------------------------------------
Added:
llvm/branches/release_37/test/CodeGen/SystemZ/args-07.ll
- copied unchanged from r244889, llvm/trunk/test/CodeGen/SystemZ/args-07.ll
llvm/branches/release_37/test/CodeGen/SystemZ/args-08.ll
- copied unchanged from r244889, llvm/trunk/test/CodeGen/SystemZ/args-08.ll
llvm/branches/release_37/test/CodeGen/SystemZ/vec-args-06.ll
- copied unchanged from r244889, llvm/trunk/test/CodeGen/SystemZ/vec-args-06.ll
llvm/branches/release_37/test/CodeGen/SystemZ/vec-args-07.ll
- copied unchanged from r244889, llvm/trunk/test/CodeGen/SystemZ/vec-args-07.ll
Modified:
llvm/branches/release_37/ (props changed)
llvm/branches/release_37/lib/Target/SystemZ/SystemZCallingConv.td
llvm/branches/release_37/lib/Target/SystemZ/SystemZISelLowering.cpp
llvm/branches/release_37/lib/Target/SystemZ/SystemZISelLowering.h
llvm/branches/release_37/test/CodeGen/SystemZ/args-04.ll
Propchange: llvm/branches/release_37/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Thu Aug 13 11:38:56 2015
@@ -1,3 +1,3 @@
/llvm/branches/Apple/Pertwee:110850,110961
/llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,242236,242239,242281,242288,242296,242331,242341,242410,242412,242433-242434,242442,242543,242673,242680,242706,242721-242722,242733-242735,242742,242869,242919,242993,243001,243057,243116,243263,243294,243361,243469,243485,243500,243519,243531,243589,243609,243636,243638-243640,243745,243891,243898,243927,243932,243934,243984,243986,243999,244058,244123,244418,244554,244644,244676,244789
+/llvm/trunk:155241,242236,242239,242281,242288,242296,242331,242341,242410,242412,242433-242434,242442,242543,242673,242680,242706,242721-242722,242733-242735,242742,242869,242919,242993,243001,243057,243116,243263,243294,243361,243469,243485,243500,243519,243531,243589,243609,243636,243638-243640,243745,243891,243898,243927,243932,243934,243984,243986,243999,244058,244123,244418,244554,244644,244676,244789,244889
Modified: llvm/branches/release_37/lib/Target/SystemZ/SystemZCallingConv.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_37/lib/Target/SystemZ/SystemZCallingConv.td?rev=244909&r1=244908&r2=244909&view=diff
==============================================================================
--- llvm/branches/release_37/lib/Target/SystemZ/SystemZCallingConv.td (original)
+++ llvm/branches/release_37/lib/Target/SystemZ/SystemZCallingConv.td Thu Aug 13 11:38:56 2015
@@ -53,10 +53,6 @@ def RetCC_SystemZ : CallingConv<[
CCIfSubtarget<"hasVector()",
CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
CCAssignToReg<[V24, V26, V28, V30, V25, V27, V29, V31]>>>
-
- // ABI-compliant code returns long double by reference, but that conversion
- // is left to higher-level code. Perhaps we could add an f128 definition
- // here for code that doesn't care about the ABI?
]>;
//===----------------------------------------------------------------------===//
Modified: llvm/branches/release_37/lib/Target/SystemZ/SystemZISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_37/lib/Target/SystemZ/SystemZISelLowering.cpp?rev=244909&r1=244908&r2=244909&view=diff
==============================================================================
--- llvm/branches/release_37/lib/Target/SystemZ/SystemZISelLowering.cpp (original)
+++ llvm/branches/release_37/lib/Target/SystemZ/SystemZISelLowering.cpp Thu Aug 13 11:38:56 2015
@@ -1175,6 +1175,20 @@ SystemZTargetLowering::LowerCall(CallLow
return Chain;
}
+bool SystemZTargetLowering::
+CanLowerReturn(CallingConv::ID CallConv,
+ MachineFunction &MF, bool isVarArg,
+ const SmallVectorImpl<ISD::OutputArg> &Outs,
+ LLVMContext &Context) const {
+ // Detect unsupported vector return types.
+ if (Subtarget.hasVector())
+ VerifyVectorTypes(Outs);
+
+ SmallVector<CCValAssign, 16> RetLocs;
+ CCState RetCCInfo(CallConv, isVarArg, MF, RetLocs, Context);
+ return RetCCInfo.CheckReturn(Outs, RetCC_SystemZ);
+}
+
SDValue
SystemZTargetLowering::LowerReturn(SDValue Chain,
CallingConv::ID CallConv, bool IsVarArg,
Modified: llvm/branches/release_37/lib/Target/SystemZ/SystemZISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_37/lib/Target/SystemZ/SystemZISelLowering.h?rev=244909&r1=244908&r2=244909&view=diff
==============================================================================
--- llvm/branches/release_37/lib/Target/SystemZ/SystemZISelLowering.h (original)
+++ llvm/branches/release_37/lib/Target/SystemZ/SystemZISelLowering.h Thu Aug 13 11:38:56 2015
@@ -423,6 +423,10 @@ public:
SDValue LowerCall(CallLoweringInfo &CLI,
SmallVectorImpl<SDValue> &InVals) const override;
+ bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
+ bool isVarArg,
+ const SmallVectorImpl<ISD::OutputArg> &Outs,
+ LLVMContext &Context) const override;
SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<SDValue> &OutVals,
Modified: llvm/branches/release_37/test/CodeGen/SystemZ/args-04.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_37/test/CodeGen/SystemZ/args-04.ll?rev=244909&r1=244908&r2=244909&view=diff
==============================================================================
--- llvm/branches/release_37/test/CodeGen/SystemZ/args-04.ll (original)
+++ llvm/branches/release_37/test/CodeGen/SystemZ/args-04.ll Thu Aug 13 11:38:56 2015
@@ -124,3 +124,17 @@ define void @f13(fp128 *%r2, i16 %r3, i3
store fp128 %y, fp128 *%r2
ret void
}
+
+; Explicit fp128 return values are likewise passed indirectly.
+define fp128 @f14(fp128 %r3) {
+; CHECK-LABEL: f14:
+; CHECK: ld %f0, 0(%r3)
+; CHECK: ld %f2, 8(%r3)
+; CHECK: axbr %f0, %f0
+; CHECK: std %f0, 0(%r2)
+; CHECK: std %f2, 8(%r2)
+; CHECK: br %r14
+ %y = fadd fp128 %r3, %r3
+ ret fp128 %y
+}
+
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