[llvm-branch-commits] [llvm-branch] r204646 - Merging r200830:

[Tom Stellard]

Author: tstellar
Date: Mon Mar 24 13:21:38 2014
New Revision: 204646

URL: http://llvm.org/viewvc/llvm-project?rev=204646&view=rev
Log:
Merging r200830:

------------------------------------------------------------------------
r200830 | michel.daenzer | 2014-02-05 01:48:05 -0800 (Wed, 05 Feb 2014) | 8 lines

R600/SI: Add pattern for zero-extending i1 to i32

Fixes opencl-example if_* tests with radeonsi.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74469

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

Modified:
    llvm/branches/release_34/lib/Target/R600/SIInstructions.td
    llvm/branches/release_34/test/CodeGen/R600/zero_extend.ll

Modified: llvm/branches/release_34/lib/Target/R600/SIInstructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/Target/R600/SIInstructions.td?rev=204646&r1=204645&r2=204646&view=diff
==============================================================================
--- llvm/branches/release_34/lib/Target/R600/SIInstructions.td (original)
+++ llvm/branches/release_34/lib/Target/R600/SIInstructions.td Mon Mar 24 13:21:38 2014
@@ -1818,6 +1818,11 @@ def : Pat <
   (V_CNDMASK_B32_e64 (i32 0), (i32 -1), $src0)
 >;
 
+def : Pat <
+  (i32 (zext i1:$src0)),
+  (V_CNDMASK_B32_e64 (i32 0), (i32 1), $src0)
+>;
+
 // 1. Offset as 8bit DWORD immediate
 def : Pat <
   (SIload_constant i128:$sbase, IMM8bitDWORD:$offset),

Modified: llvm/branches/release_34/test/CodeGen/R600/zero_extend.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/test/CodeGen/R600/zero_extend.ll?rev=204646&r1=204645&r2=204646&view=diff
==============================================================================
--- llvm/branches/release_34/test/CodeGen/R600/zero_extend.ll (original)
+++ llvm/branches/release_34/test/CodeGen/R600/zero_extend.ll Mon Mar 24 13:21:38 2014
@@ -16,3 +16,13 @@ entry:
   store i64 %2, i64 addrspace(1)* %out
   ret void
 }
+
+; SI-CHECK-LABEL: @testi1toi32
+; SI-CHECK: V_CNDMASK_B32
+define void @testi1toi32(i32 addrspace(1)* %out, i32 %a, i32 %b) {
+entry:
+  %0 = icmp eq i32 %a, %b
+  %1 = zext i1 %0 to i32
+  store i32 %1, i32 addrspace(1)* %out
+  ret void
+}