[llvm-branch-commits] [llvm-branch] r223744 - Merging r222996:
Hal Finkel
hfinkel at anl.gov
Mon Dec 8 18:33:41 PST 2014
Author: hfinkel
Date: Mon Dec 8 20:33:41 2014
New Revision: 223744
URL: http://llvm.org/viewvc/llvm-project?rev=223744&view=rev
Log:
Merging r222996:
------------------------------------------------------------------------
r222996 | foad | 2014-12-01 09:42:32 +0000 (Mon, 01 Dec 2014) | 19 lines
[PowerPC] Fix unwind info with dynamic stack realignment
Summary:
PowerPC DWARF unwind info defined CFA as SP + offset even in a function
where the stack had been dynamically realigned. This clearly doesn't
work because the offset from SP to CFA is not a constant. Fix it by
defining CFA as BP instead.
This was causing the AddressSanitizer null_deref test to fail 50% of
the time, depending on whether SP happened to be 32-byte aligned on
entry to a particular function or not.
Reviewers: willschm, uweigand, hfinkel
Reviewed By: hfinkel
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D6410
------------------------------------------------------------------------
Modified:
llvm/branches/release_35/ (props changed)
llvm/branches/release_35/lib/Target/PowerPC/PPCFrameLowering.cpp
llvm/branches/release_35/test/CodeGen/PowerPC/stack-realign.ll
Propchange: llvm/branches/release_35/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Mon Dec 8 20:33:41 2014
@@ -1,3 +1,3 @@
/llvm/branches/Apple/Pertwee:110850,110961
/llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,213653,213665,213726,213749,213773,213793,213798-213799,213815,213847,213880,213883-213884,213894-213896,213899,213915,213960,213966,213999,214060,214129,214180,214287,214331,214423,214429,214517,214519,214670,214674,214679,215685,215711,215793,215795,215806,216064,216262,216531,216891,216917,216920,217102,217115,217257,217993,218745,219441,220959,221009,221318,221408,221453,221501,221703,222338,222376,222500,222672,223163,223170-223171,223500
+/llvm/trunk:155241,213653,213665,213726,213749,213773,213793,213798-213799,213815,213847,213880,213883-213884,213894-213896,213899,213915,213960,213966,213999,214060,214129,214180,214287,214331,214423,214429,214517,214519,214670,214674,214679,215685,215711,215793,215795,215806,216064,216262,216531,216891,216917,216920,217102,217115,217257,217993,218745,219441,220959,221009,221318,221408,221453,221501,221703,222338,222376,222500,222672,222996,223163,223170-223171,223500
Modified: llvm/branches/release_35/lib/Target/PowerPC/PPCFrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_35/lib/Target/PowerPC/PPCFrameLowering.cpp?rev=223744&r1=223743&r2=223744&view=diff
==============================================================================
--- llvm/branches/release_35/lib/Target/PowerPC/PPCFrameLowering.cpp (original)
+++ llvm/branches/release_35/lib/Target/PowerPC/PPCFrameLowering.cpp Mon Dec 8 20:33:41 2014
@@ -505,7 +505,7 @@ void PPCFrameLowering::emitPrologue(Mach
MachineModuleInfo &MMI = MF.getMMI();
const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
DebugLoc dl;
- bool needsFrameMoves = MMI.hasDebugInfo() ||
+ bool needsCFI = MMI.hasDebugInfo() ||
MF.getFunction()->needsUnwindTableEntry();
bool isPIC = MF.getTarget().getRelocationModel() == Reloc::PIC_;
@@ -726,17 +726,28 @@ void PPCFrameLowering::emitPrologue(Mach
.addReg(ScratchReg);
}
- // Add the "machine moves" for the instructions we generated above, but in
- // reverse order.
- if (needsFrameMoves) {
- // Show update of SP.
- assert(NegFrameSize);
- unsigned CFIIndex = MMI.addFrameInst(
- MCCFIInstruction::createDefCfaOffset(nullptr, NegFrameSize));
+ // Add Call Frame Information for the instructions we generated above.
+ if (needsCFI) {
+ unsigned CFIIndex;
+
+ if (HasBP) {
+ // Define CFA in terms of BP. Do this in preference to using FP/SP,
+ // because if the stack needed aligning then CFA won't be at a fixed
+ // offset from FP/SP.
+ unsigned Reg = MRI->getDwarfRegNum(BPReg, true);
+ CFIIndex = MMI.addFrameInst(
+ MCCFIInstruction::createDefCfaRegister(nullptr, Reg));
+ } else {
+ // Adjust the definition of CFA to account for the change in SP.
+ assert(NegFrameSize);
+ CFIIndex = MMI.addFrameInst(
+ MCCFIInstruction::createDefCfaOffset(nullptr, NegFrameSize));
+ }
BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
.addCFIIndex(CFIIndex);
if (HasFP) {
+ // Describe where FP was saved, at a fixed offset from CFA.
unsigned Reg = MRI->getDwarfRegNum(FPReg, true);
CFIIndex = MMI.addFrameInst(
MCCFIInstruction::createOffset(nullptr, Reg, FPOffset));
@@ -745,6 +756,7 @@ void PPCFrameLowering::emitPrologue(Mach
}
if (HasBP) {
+ // Describe where BP was saved, at a fixed offset from CFA.
unsigned Reg = MRI->getDwarfRegNum(BPReg, true);
CFIIndex = MMI.addFrameInst(
MCCFIInstruction::createOffset(nullptr, Reg, BPOffset));
@@ -753,6 +765,7 @@ void PPCFrameLowering::emitPrologue(Mach
}
if (MustSaveLR) {
+ // Describe where LR was saved, at a fixed offset from CFA.
unsigned Reg = MRI->getDwarfRegNum(LRReg, true);
CFIIndex = MMI.addFrameInst(
MCCFIInstruction::createOffset(nullptr, Reg, LROffset));
@@ -767,8 +780,9 @@ void PPCFrameLowering::emitPrologue(Mach
.addReg(SPReg)
.addReg(SPReg);
- if (needsFrameMoves) {
- // Mark effective beginning of when frame pointer is ready.
+ if (!HasBP && needsCFI) {
+ // Change the definition of CFA from SP+offset to FP+offset, because SP
+ // will change at every alloca.
unsigned Reg = MRI->getDwarfRegNum(FPReg, true);
unsigned CFIIndex = MMI.addFrameInst(
MCCFIInstruction::createDefCfaRegister(nullptr, Reg));
@@ -778,8 +792,9 @@ void PPCFrameLowering::emitPrologue(Mach
}
}
- if (needsFrameMoves) {
- // Add callee saved registers to move list.
+ if (needsCFI) {
+ // Describe where callee saved registers were saved, at fixed offsets from
+ // CFA.
const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
unsigned Reg = CSI[I].getReg();
Modified: llvm/branches/release_35/test/CodeGen/PowerPC/stack-realign.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_35/test/CodeGen/PowerPC/stack-realign.ll?rev=223744&r1=223743&r2=223744&view=diff
==============================================================================
--- llvm/branches/release_35/test/CodeGen/PowerPC/stack-realign.ll (original)
+++ llvm/branches/release_35/test/CodeGen/PowerPC/stack-realign.ll Mon Dec 8 20:33:41 2014
@@ -37,6 +37,7 @@ entry:
; CHECK-DAG: subfic 0, [[REG]], -160
; CHECK: stdux 1, 1, 0
+; CHECK: .cfi_def_cfa_register r30
; CHECK: .cfi_offset r30, -16
; CHECK: .cfi_offset lr, 16
@@ -59,6 +60,7 @@ entry:
; CHECK-FP-DAG: subfic 0, [[REG]], -160
; CHECK-FP: stdux 1, 1, 0
+; CHECK-FP: .cfi_def_cfa_register r30
; CHECK-FP: .cfi_offset r31, -8
; CHECK-FP: .cfi_offset r30, -16
; CHECK-FP: .cfi_offset lr, 16
@@ -120,6 +122,8 @@ entry:
; CHECK-DAG: subfc 0, [[REG3]], [[REG2]]
; CHECK: stdux 1, 1, 0
+; CHECK: .cfi_def_cfa_register r30
+
; CHECK: blr
; CHECK-32-LABEL: @hoo
@@ -178,6 +182,8 @@ entry:
; CHECK-DAG: subfic 0, [[REG]], -192
; CHECK: stdux 1, 1, 0
+; CHECK: .cfi_def_cfa_register r30
+
; CHECK: stfd 30, -16(30)
; CHECK: blr
@@ -193,6 +199,8 @@ entry:
; CHECK-FP-DAG: subfic 0, [[REG]], -192
; CHECK-FP: stdux 1, 1, 0
+; CHECK-FP: .cfi_def_cfa_register r30
+
; CHECK-FP: stfd 30, -16(30)
; CHECK-FP: blr
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