[llvm-branch-commits] [llvm-branch] r223065 - Merged from r221529:
Daniel Sanders
daniel.sanders at imgtec.com
Mon Dec 1 11:02:59 PST 2014
Author: dsanders
Date: Mon Dec 1 13:02:59 2014
New Revision: 223065
URL: http://llvm.org/viewvc/llvm-project?rev=223065&view=rev
Log:
Merged from r221529:
[mips] Removed the remainder of MipsCC. NFC.
Summary:
One of the calls to AllocateStack (the one in LowerCall) doesn't look like
it should be there but it was there before and removing it breaks the
frame size calculation.
Reviewers: vmedic, theraven
Reviewed By: theraven
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D6116
Modified:
llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.cpp
llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.h
Modified: llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.cpp?rev=223065&r1=223064&r2=223065&view=diff
==============================================================================
--- llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.cpp Mon Dec 1 13:02:59 2014
@@ -2468,7 +2468,11 @@ MipsTargetLowering::LowerCall(TargetLowe
CallConv, IsVarArg, DAG.getMachineFunction(),
getTargetMachine(), ArgLocs, *DAG.getContext(),
MipsCCState::getSpecialCallingConvForCallee(Callee.getNode(), Subtarget));
- MipsCC MipsCCInfo(CallConv, Subtarget, CCInfo);
+
+ // Allocate the reserved argument area. It seems strange to do this from the
+ // caller side but removing it breaks the frame size calculation.
+ const MipsABIInfo &ABI = Subtarget.getABI();
+ CCInfo.AllocateStack(ABI.GetCalleeAllocdArgSizeInBytes(CallConv), 1);
CCInfo.AnalyzeCallOperands(Outs, CC_Mips, CLI.getArgs(), Callee.getNode());
@@ -2526,8 +2530,8 @@ MipsTargetLowering::LowerCall(TargetLowe
assert(!IsTailCall &&
"Do not tail-call optimize if there is a byval argument.");
passByValArg(Chain, DL, RegsToPass, MemOpChains, StackPtr, MFI, DAG, Arg,
- MipsCCInfo, FirstByValReg, LastByValReg, Flags,
- Subtarget.isLittle(), VA);
+ FirstByValReg, LastByValReg, Flags, Subtarget.isLittle(),
+ VA);
CCInfo.nextInRegsParam();
continue;
}
@@ -2752,7 +2756,8 @@ MipsTargetLowering::LowerFormalArguments
SmallVector<CCValAssign, 16> ArgLocs;
MipsCCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(),
getTargetMachine(), ArgLocs, *DAG.getContext());
- MipsCC MipsCCInfo(CallConv, Subtarget, CCInfo);
+ const MipsABIInfo &ABI = Subtarget.getABI();
+ CCInfo.AllocateStack(ABI.GetCalleeAllocdArgSizeInBytes(CallConv), 1);
Function::const_arg_iterator FuncArg =
DAG.getMachineFunction().getFunction()->arg_begin();
@@ -2780,7 +2785,7 @@ MipsTargetLowering::LowerFormalArguments
"ByVal args of size 0 should have been ignored by front-end.");
assert(ByValIdx < CCInfo.getInRegsParamsCount());
copyByValRegs(Chain, DL, OutChains, DAG, Flags, InVals, &*FuncArg,
- MipsCCInfo, FirstByValReg, LastByValReg, VA, CCInfo);
+ FirstByValReg, LastByValReg, VA, CCInfo);
CCInfo.nextInRegsParam();
continue;
}
@@ -2874,7 +2879,7 @@ MipsTargetLowering::LowerFormalArguments
}
if (IsVarArg)
- writeVarArgRegs(OutChains, MipsCCInfo, Chain, DL, DAG, CCInfo);
+ writeVarArgRegs(OutChains, Chain, DL, DAG, CCInfo);
// All stores are grouped in one node to allow the matching between
// the size of Ins and InVals. This only happens when on varg functions
@@ -3399,19 +3404,11 @@ unsigned MipsTargetLowering::getJumpTabl
return TargetLowering::getJumpTableEncoding();
}
-MipsTargetLowering::MipsCC::MipsCC(CallingConv::ID CC,
- const MipsSubtarget &Subtarget_,
- CCState &Info)
- : CallConv(CC), Subtarget(Subtarget_) {
- // Pre-allocate reserved argument area.
- Info.AllocateStack(Subtarget.getABI().GetCalleeAllocdArgSizeInBytes(CC), 1);
-}
-
void MipsTargetLowering::copyByValRegs(
SDValue Chain, SDLoc DL, std::vector<SDValue> &OutChains, SelectionDAG &DAG,
const ISD::ArgFlagsTy &Flags, SmallVectorImpl<SDValue> &InVals,
- const Argument *FuncArg, const MipsCC &CC, unsigned FirstReg,
- unsigned LastReg, const CCValAssign &VA, MipsCCState &State) const {
+ const Argument *FuncArg, unsigned FirstReg, unsigned LastReg,
+ const CCValAssign &VA, MipsCCState &State) const {
MachineFunction &MF = DAG.getMachineFunction();
MachineFrameInfo *MFI = MF.getFrameInfo();
unsigned GPRSizeInBytes = Subtarget.getGPRSizeInBytes();
@@ -3460,9 +3457,9 @@ void MipsTargetLowering::passByValArg(
SDValue Chain, SDLoc DL,
std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
SmallVectorImpl<SDValue> &MemOpChains, SDValue StackPtr,
- MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg, const MipsCC &CC,
- unsigned FirstReg, unsigned LastReg, const ISD::ArgFlagsTy &Flags,
- bool isLittle, const CCValAssign &VA) const {
+ MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg, unsigned FirstReg,
+ unsigned LastReg, const ISD::ArgFlagsTy &Flags, bool isLittle,
+ const CCValAssign &VA) const {
unsigned ByValSizeInBytes = Flags.getByValSize();
unsigned OffsetInBytes = 0; // From beginning of struct
unsigned RegSizeInBytes = Subtarget.getGPRSizeInBytes();
@@ -3550,8 +3547,8 @@ void MipsTargetLowering::passByValArg(
}
void MipsTargetLowering::writeVarArgRegs(std::vector<SDValue> &OutChains,
- const MipsCC &CC, SDValue Chain,
- SDLoc DL, SelectionDAG &DAG,
+ SDValue Chain, SDLoc DL,
+ SelectionDAG &DAG,
CCState &State) const {
const ArrayRef<MCPhysReg> ArgRegs = Subtarget.getABI().GetVarArgRegs();
unsigned Idx = State.getFirstUnallocated(ArgRegs.data(), ArgRegs.size());
Modified: llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.h?rev=223065&r1=223064&r2=223065&view=diff
==============================================================================
--- llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.h (original)
+++ llvm/branches/release_35/lib/Target/Mips/MipsISelLowering.h Mon Dec 1 13:02:59 2014
@@ -341,17 +341,6 @@ namespace llvm {
bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage,
CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const;
- /// MipsCC - This class provides methods used to analyze formal and call
- /// arguments and inquire about calling convention information.
- class MipsCC {
- public:
- MipsCC(CallingConv::ID CallConv, const MipsSubtarget &Subtarget,
- CCState &Info);
-
- private:
- CallingConv::ID CallConv;
- const MipsSubtarget &Subtarget;
- };
protected:
SDValue lowerLOAD(SDValue Op, SelectionDAG &DAG) const;
SDValue lowerSTORE(SDValue Op, SelectionDAG &DAG) const;
@@ -425,25 +414,24 @@ namespace llvm {
void copyByValRegs(SDValue Chain, SDLoc DL, std::vector<SDValue> &OutChains,
SelectionDAG &DAG, const ISD::ArgFlagsTy &Flags,
SmallVectorImpl<SDValue> &InVals,
- const Argument *FuncArg, const MipsCC &CC,
- unsigned FirstReg, unsigned LastReg,
- const CCValAssign &VA, MipsCCState &State) const;
+ const Argument *FuncArg, unsigned FirstReg,
+ unsigned LastReg, const CCValAssign &VA,
+ MipsCCState &State) const;
/// passByValArg - Pass a byval argument in registers or on stack.
void passByValArg(SDValue Chain, SDLoc DL,
std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
SmallVectorImpl<SDValue> &MemOpChains, SDValue StackPtr,
MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg,
- const MipsCC &CC, unsigned FirstReg, unsigned LastReg,
+ unsigned FirstReg, unsigned LastReg,
const ISD::ArgFlagsTy &Flags, bool isLittle,
const CCValAssign &VA) const;
/// writeVarArgRegs - Write variable function arguments passed in registers
/// to the stack. Also create a stack frame object for the first variable
/// argument.
- void writeVarArgRegs(std::vector<SDValue> &OutChains, const MipsCC &CC,
- SDValue Chain, SDLoc DL, SelectionDAG &DAG,
- CCState &State) const;
+ void writeVarArgRegs(std::vector<SDValue> &OutChains, SDValue Chain,
+ SDLoc DL, SelectionDAG &DAG, CCState &State) const;
SDValue
LowerFormalArguments(SDValue Chain,
More information about the llvm-branch-commits
mailing list