[llvm-branch-commits] [llvm-branch] r195867 - Merging r195573:
Bill Wendling
isanbard at gmail.com
Wed Nov 27 11:39:49 PST 2013
Author: void
Date: Wed Nov 27 13:39:49 2013
New Revision: 195867
URL: http://llvm.org/viewvc/llvm-project?rev=195867&view=rev
Log:
Merging r195573:
------------------------------------------------------------------------
r195573 | venkatra | 2013-11-24 09:41:41 -0800 (Sun, 24 Nov 2013) | 2 lines
[SparcV9] Enable custom lowering of DYNAMIC_STACKALLOC in sparc64.
------------------------------------------------------------------------
Modified:
llvm/branches/release_34/ (props changed)
llvm/branches/release_34/lib/Target/Sparc/SparcISelLowering.cpp
llvm/branches/release_34/test/CodeGen/SPARC/2013-05-17-CallFrame.ll
Propchange: llvm/branches/release_34/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Wed Nov 27 13:39:49 2013
@@ -1,3 +1,3 @@
/llvm/branches/Apple/Pertwee:110850,110961
/llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,195092-195094,195100,195102-195103,195118,195129,195136,195138,195148,195152,195156-195157,195161-195162,195193,195272,195317-195318,195327,195330,195333,195339,195343,195355,195364,195379,195397-195399,195408,195421,195423-195424,195432,195439,195444,195455-195456,195469,195476-195477,195479,195491-195493,195514,195528,195547,195567,195591,195599,195632,195635-195636,195670,195679,195682,195684,195713,195716,195769,195773,195779,195791,195798
+/llvm/trunk:155241,195092-195094,195100,195102-195103,195118,195129,195136,195138,195148,195152,195156-195157,195161-195162,195193,195272,195317-195318,195327,195330,195333,195339,195343,195355,195364,195379,195397-195399,195408,195421,195423-195424,195432,195439,195444,195455-195456,195469,195476-195477,195479,195491-195493,195514,195528,195547,195567,195573,195591,195599,195632,195635-195636,195670,195679,195682,195684,195713,195716,195769,195773,195779,195791,195798
Modified: llvm/branches/release_34/lib/Target/Sparc/SparcISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/Target/Sparc/SparcISelLowering.cpp?rev=195867&r1=195866&r2=195867&view=diff
==============================================================================
--- llvm/branches/release_34/lib/Target/Sparc/SparcISelLowering.cpp (original)
+++ llvm/branches/release_34/lib/Target/Sparc/SparcISelLowering.cpp Wed Nov 27 13:39:49 2013
@@ -1411,6 +1411,7 @@ SparcTargetLowering::SparcTargetLowering
setOperationAction(ISD::BSWAP, MVT::i64, Expand);
setOperationAction(ISD::ROTL , MVT::i64, Expand);
setOperationAction(ISD::ROTR , MVT::i64, Expand);
+ setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Custom);
}
// FIXME: There are instructions available for ATOMIC_FENCE
@@ -2289,20 +2290,23 @@ static SDValue LowerVAARG(SDValue Op, Se
std::min(PtrVT.getSizeInBits(), VT.getSizeInBits())/8);
}
-static SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) {
+static SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG,
+ bool is64Bit) {
SDValue Chain = Op.getOperand(0); // Legalize the chain.
SDValue Size = Op.getOperand(1); // Legalize the size.
+ EVT VT = Size->getValueType(0);
SDLoc dl(Op);
unsigned SPReg = SP::O6;
- SDValue SP = DAG.getCopyFromReg(Chain, dl, SPReg, MVT::i32);
- SDValue NewSP = DAG.getNode(ISD::SUB, dl, MVT::i32, SP, Size); // Value
+ SDValue SP = DAG.getCopyFromReg(Chain, dl, SPReg, VT);
+ SDValue NewSP = DAG.getNode(ISD::SUB, dl, VT, SP, Size); // Value
Chain = DAG.getCopyToReg(SP.getValue(1), dl, SPReg, NewSP); // Output chain
// The resultant pointer is actually 16 words from the bottom of the stack,
// to provide a register spill area.
- SDValue NewVal = DAG.getNode(ISD::ADD, dl, MVT::i32, NewSP,
- DAG.getConstant(96, MVT::i32));
+ unsigned regSpillArea = (is64Bit) ? 128 : 96;
+ SDValue NewVal = DAG.getNode(ISD::ADD, dl, VT, NewSP,
+ DAG.getConstant(regSpillArea, VT));
SDValue Ops[2] = { NewVal, Chain };
return DAG.getMergeValues(Ops, 2, dl);
}
@@ -2626,7 +2630,8 @@ LowerOperation(SDValue Op, SelectionDAG
hasHardQuad);
case ISD::VASTART: return LowerVASTART(Op, DAG, *this);
case ISD::VAARG: return LowerVAARG(Op, DAG);
- case ISD::DYNAMIC_STACKALLOC: return LowerDYNAMIC_STACKALLOC(Op, DAG);
+ case ISD::DYNAMIC_STACKALLOC: return LowerDYNAMIC_STACKALLOC(Op, DAG,
+ is64Bit);
case ISD::LOAD: return LowerF128Load(Op, DAG);
case ISD::STORE: return LowerF128Store(Op, DAG);
Modified: llvm/branches/release_34/test/CodeGen/SPARC/2013-05-17-CallFrame.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/test/CodeGen/SPARC/2013-05-17-CallFrame.ll?rev=195867&r1=195866&r2=195867&view=diff
==============================================================================
--- llvm/branches/release_34/test/CodeGen/SPARC/2013-05-17-CallFrame.ll (original)
+++ llvm/branches/release_34/test/CodeGen/SPARC/2013-05-17-CallFrame.ll Wed Nov 27 13:39:49 2013
@@ -1,10 +1,20 @@
-; RUN: llc -march=sparc < %s | FileCheck %s
+; RUN: llc -march=sparc < %s | FileCheck %s --check-prefix=V8
+; RUN: llc -march=sparcv9 < %s | FileCheck %s --check-prefix=SPARC64
+
+; V8-LABEL: variable_alloca_with_adj_call_stack
+; V8: save %sp, -96, %sp
+; V8: add {{.+}}, 96, %o0
+; V8: add %sp, -16, %sp
+; V8: call foo
+; V8: add %sp, 16, %sp
+
+; SPARC64-LABEL: variable_alloca_with_adj_call_stack
+; SPARC64: save %sp, -128, %sp
+; SPARC64: add {{.+}}, 128, %o0
+; SPARC64: add %sp, -80, %sp
+; SPARC64: call foo
+; SPARC64: add %sp, 80, %sp
-; CHECK: variable_alloca_with_adj_call_stack
-; CHECK: save %sp, -96, %sp
-; CHECK: add %sp, -16, %sp
-; CHECK: call foo
-; CHECK: add %sp, 16, %sp
define void @variable_alloca_with_adj_call_stack(i32 %num) {
entry:
%0 = alloca i8, i32 %num, align 8
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