[llvm-branch-commits] [llvm-branch] r195651 - Merging r195635:

[Daniel Sanders]

Author: dsanders
Date: Mon Nov 25 09:53:39 2013
New Revision: 195651

URL: http://llvm.org/viewvc/llvm-project?rev=195651&view=rev
Log:
Merging r195635:
------------------------------------------------------------------------
r195635 | dsanders | 2013-11-25 11:14:43 +0000 (Mon, 25 Nov 2013) | 19 lines

Fixed tryFoldToZero() for vector types that need expansion.

Summary:
Moved the requirement for SelectionDAG::getConstant() to return legally
typed nodes slightly earlier. There were two optional DAGCombine passes
that were missed out and were required to produce type-legal DAGs.

Simplified a code-path in tryFoldToZero() to use SelectionDAG::getConstant().
This provides support for both promoted and expanded vector types whereas the
previous code only supported promoted vector types.

Fixes a "Type for zero vector elements is not legal" assertion detected by
an llvm-stress generated test.

Reviewers: resistor

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2251
------------------------------------------------------------------------


Added:
    llvm/branches/release_34/test/CodeGen/Mips/msa/llvm-stress-s3926023935.ll
      - copied unchanged from r195635, llvm/trunk/test/CodeGen/Mips/msa/llvm-stress-s3926023935.ll
Modified:
    llvm/branches/release_34/   (props changed)
    llvm/branches/release_34/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/branches/release_34/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Propchange: llvm/branches/release_34/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Mon Nov 25 09:53:39 2013
@@ -1,3 +1,3 @@
 /llvm/branches/Apple/Pertwee:110850,110961
 /llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,195092-195094,195100,195102-195103,195118,195129,195136,195138,195152,195156-195157,195161-195162,195193,195272,195317-195318,195327,195330,195333,195339,195355,195397-195399,195421,195423,195432,195439,195476-195477,195479,195491-195493,195514,195528,195547,195567,195591,195599
+/llvm/trunk:155241,195092-195094,195100,195102-195103,195118,195129,195136,195138,195152,195156-195157,195161-195162,195193,195272,195317-195318,195327,195330,195333,195339,195355,195397-195399,195421,195423,195432,195439,195476-195477,195479,195491-195493,195514,195528,195547,195567,195591,195599,195635

Modified: llvm/branches/release_34/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=195651&r1=195650&r2=195651&view=diff
==============================================================================
--- llvm/branches/release_34/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/branches/release_34/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Nov 25 09:53:39 2013
@@ -1635,19 +1635,8 @@ static SDValue tryFoldToZero(SDLoc DL, c
                              bool LegalOperations, bool LegalTypes) {
   if (!VT.isVector())
     return DAG.getConstant(0, VT);
-  if (!LegalOperations || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) {
-    // Produce a vector of zeros.
-    EVT ElemTy = VT.getVectorElementType();
-    if (LegalTypes && TLI.getTypeAction(*DAG.getContext(), ElemTy) ==
-                      TargetLowering::TypePromoteInteger)
-      ElemTy = TLI.getTypeToTransformTo(*DAG.getContext(), ElemTy);
-    assert((!LegalTypes || TLI.isTypeLegal(ElemTy)) &&
-           "Type for zero vector elements is not legal");
-    SDValue El = DAG.getConstant(0, ElemTy);
-    std::vector<SDValue> Ops(VT.getVectorNumElements(), El);
-    return DAG.getNode(ISD::BUILD_VECTOR, DL, VT,
-      &Ops[0], Ops.size());
-  }
+  if (!LegalOperations || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT))
+    return DAG.getConstant(0, VT);
   return SDValue();
 }
 

Modified: llvm/branches/release_34/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=195651&r1=195650&r2=195651&view=diff
==============================================================================
--- llvm/branches/release_34/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/branches/release_34/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Nov 25 09:53:39 2013
@@ -670,6 +670,8 @@ void SelectionDAGISel::CodeGenAndEmitDAG
   DEBUG(dbgs() << "Type-legalized selection DAG: BB#" << BlockNumber
         << " '" << BlockName << "'\n"; CurDAG->dump());
 
+  CurDAG->NewNodesMustHaveLegalTypes = true;
+
   if (Changed) {
     if (ViewDAGCombineLT)
       CurDAG->viewGraph("dag-combine-lt input for " + BlockName);
@@ -711,8 +713,6 @@ void SelectionDAGISel::CodeGenAndEmitDAG
           << BlockNumber << " '" << BlockName << "'\n"; CurDAG->dump());
   }
 
-  CurDAG->NewNodesMustHaveLegalTypes = true;
-
   if (ViewLegalizeDAGs) CurDAG->viewGraph("legalize input for " + BlockName);
 
   {