[llvm-branch-commits] [llvm-branch] r195218 - Merging r195129:

[Bill Wendling]

Author: void
Date: Wed Nov 20 00:17:43 2013
New Revision: 195218

URL: http://llvm.org/viewvc/llvm-project?rev=195218&view=rev
Log:
Merging r195129:
------------------------------------------------------------------------
r195129 | mcinally | 2013-11-19 06:36:00 -0800 (Tue, 19 Nov 2013) | 2 lines

Fix assembly operands for the SSE2 cvtsd2ss instruction.

------------------------------------------------------------------------

Modified:
    llvm/branches/release_34/   (props changed)
    llvm/branches/release_34/lib/Target/X86/X86InstrSSE.td
    llvm/branches/release_34/test/CodeGen/X86/sse2-intrinsics-x86.ll

Propchange: llvm/branches/release_34/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Wed Nov 20 00:17:43 2013
@@ -1,3 +1,3 @@
 /llvm/branches/Apple/Pertwee:110850,110961
 /llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,195092-195094,195100,195102-195103,195118,195193
+/llvm/trunk:155241,195092-195094,195100,195102-195103,195118,195129,195193

Modified: llvm/branches/release_34/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/Target/X86/X86InstrSSE.td?rev=195218&r1=195217&r2=195218&view=diff
==============================================================================
--- llvm/branches/release_34/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/branches/release_34/lib/Target/X86/X86InstrSSE.td Wed Nov 20 00:17:43 2013
@@ -1810,14 +1810,14 @@ def Int_VCVTSD2SSrm: I<0x5A, MRMSrcReg,
 let Constraints = "$src1 = $dst" in {
 def Int_CVTSD2SSrr: I<0x5A, MRMSrcReg,
                        (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
-                       "cvtsd2ss\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                       "cvtsd2ss\t{$src2, $dst|$dst, $src2}",
                        [(set VR128:$dst,
                          (int_x86_sse2_cvtsd2ss VR128:$src1, VR128:$src2))],
                        IIC_SSE_CVT_Scalar_RR>, XD, Requires<[UseSSE2]>,
                        Sched<[WriteCvtF2F]>;
 def Int_CVTSD2SSrm: I<0x5A, MRMSrcReg,
                        (outs VR128:$dst), (ins VR128:$src1, sdmem:$src2),
-                       "cvtsd2ss\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                       "cvtsd2ss\t{$src2, $dst|$dst, $src2}",
                        [(set VR128:$dst, (int_x86_sse2_cvtsd2ss
                                           VR128:$src1, sse_load_f64:$src2))],
                        IIC_SSE_CVT_Scalar_RM>, XD, Requires<[UseSSE2]>,

Modified: llvm/branches/release_34/test/CodeGen/X86/sse2-intrinsics-x86.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/test/CodeGen/X86/sse2-intrinsics-x86.ll?rev=195218&r1=195217&r2=195218&view=diff
==============================================================================
--- llvm/branches/release_34/test/CodeGen/X86/sse2-intrinsics-x86.ll (original)
+++ llvm/branches/release_34/test/CodeGen/X86/sse2-intrinsics-x86.ll Wed Nov 20 00:17:43 2013
@@ -142,6 +142,7 @@ declare i32 @llvm.x86.sse2.cvtsd2si(<2 x
 
 define <4 x float> @test_x86_sse2_cvtsd2ss(<4 x float> %a0, <2 x double> %a1) {
   ; CHECK: cvtsd2ss 
+  ; CHECK-NOT: cvtsd2ss %xmm{{[0-9]+}}, %xmm{{[0-9]+}}, %xmm{{[0-9]+}} 
   %res = call <4 x float> @llvm.x86.sse2.cvtsd2ss(<4 x float> %a0, <2 x double> %a1) ; <<4 x float>> [#uses=1]
   ret <4 x float> %res
 }