[llvm-branch-commits] [llvm-branch] r182416 - Merging r182112:
Bill Wendling
isanbard at gmail.com
Tue May 21 13:21:23 PDT 2013
Author: void
Date: Tue May 21 15:21:23 2013
New Revision: 182416
URL: http://llvm.org/viewvc/llvm-project?rev=182416&view=rev
Log:
Merging r182112:
------------------------------------------------------------------------
r182112 | tstellar | 2013-05-17 08:23:12 -0700 (Fri, 17 May 2013) | 1 line
R600: Pass MCSubtargetInfo reference to R600CodeEmitter
------------------------------------------------------------------------
Modified:
llvm/branches/release_33/ (props changed)
llvm/branches/release_33/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp
llvm/branches/release_33/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h
llvm/branches/release_33/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
Propchange: llvm/branches/release_33/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Tue May 21 15:21:23 2013
@@ -1,3 +1,3 @@
/llvm/branches/Apple/Pertwee:110850,110961
/llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,181286,181296,181313,181397,181423,181450,181524,181529,181540,181576-181580,181586,181600,181678,181706,181792,181800,181842,181864,182072,182113,182344,182364
+/llvm/trunk:155241,181286,181296,181313,181397,181423,181450,181524,181529,181540,181576-181580,181586,181600,181678,181706,181792,181800,181842,181864,182072,182112-182113,182344,182364
Modified: llvm/branches/release_33/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_33/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp?rev=182416&r1=182415&r2=182416&view=diff
==============================================================================
--- llvm/branches/release_33/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp (original)
+++ llvm/branches/release_33/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp Tue May 21 15:21:23 2013
@@ -78,7 +78,7 @@ static MCCodeEmitter *createAMDGPUMCCode
if (STI.getFeatureBits() & AMDGPU::Feature64BitPtr) {
return createSIMCCodeEmitter(MCII, MRI, STI, Ctx);
} else {
- return createR600MCCodeEmitter(MCII, MRI);
+ return createR600MCCodeEmitter(MCII, MRI, STI);
}
}
Modified: llvm/branches/release_33/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_33/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h?rev=182416&r1=182415&r2=182416&view=diff
==============================================================================
--- llvm/branches/release_33/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h (original)
+++ llvm/branches/release_33/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h Tue May 21 15:21:23 2013
@@ -32,7 +32,8 @@ class raw_ostream;
extern Target TheAMDGPUTarget;
MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII,
- const MCRegisterInfo &MRI);
+ const MCRegisterInfo &MRI,
+ const MCSubtargetInfo &STI);
MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII,
const MCRegisterInfo &MRI,
Modified: llvm/branches/release_33/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_33/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp?rev=182416&r1=182415&r2=182416&view=diff
==============================================================================
--- llvm/branches/release_33/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp (original)
+++ llvm/branches/release_33/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp Tue May 21 15:21:23 2013
@@ -35,11 +35,13 @@ class R600MCCodeEmitter : public AMDGPUM
void operator=(const R600MCCodeEmitter &) LLVM_DELETED_FUNCTION;
const MCInstrInfo &MCII;
const MCRegisterInfo &MRI;
+ const MCSubtargetInfo &STI;
public:
- R600MCCodeEmitter(const MCInstrInfo &mcii, const MCRegisterInfo &mri)
- : MCII(mcii), MRI(mri) { }
+ R600MCCodeEmitter(const MCInstrInfo &mcii, const MCRegisterInfo &mri,
+ const MCSubtargetInfo &sti)
+ : MCII(mcii), MRI(mri), STI(sti) { }
/// \brief Encode the instruction and write it to the OS.
virtual void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
@@ -95,8 +97,9 @@ enum TextureTypes {
};
MCCodeEmitter *llvm::createR600MCCodeEmitter(const MCInstrInfo &MCII,
- const MCRegisterInfo &MRI) {
- return new R600MCCodeEmitter(MCII, MRI);
+ const MCRegisterInfo &MRI,
+ const MCSubtargetInfo &STI) {
+ return new R600MCCodeEmitter(MCII, MRI, STI);
}
void R600MCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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