[llvm-branch-commits] [llvm-branch] r168527 - in /llvm/branches/release_32: ./ lib/CodeGen/LiveInterval.cpp test/CodeGen/X86/inline-asm.ll

[Pawel Wodnicki]

Author: pawel
Date: Fri Nov 23 14:02:28 2012
New Revision: 168527

URL: http://llvm.org/viewvc/llvm-project?rev=168527&view=rev
Log:
Merging r168320: into 3.2 relase branch.

Handle mixed normal and early-clobber defs on inline asm.

PR14376.

Modified:
    llvm/branches/release_32/   (props changed)
    llvm/branches/release_32/lib/CodeGen/LiveInterval.cpp
    llvm/branches/release_32/test/CodeGen/X86/inline-asm.ll

Propchange: llvm/branches/release_32/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Fri Nov 23 14:02:28 2012
@@ -1,3 +1,3 @@
 /llvm/branches/Apple/Pertwee:110850,110961
 /llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,167718-167719,167731,167737,167743,167750,167784,167811,167817,167855,167860-167864,167875,167942,167948,167966,168001,168035,168181,168189,168197-168198,168227,168280,168291,168316,168319,168346,168352,168354,168361,168364,168512
+/llvm/trunk:155241,167718-167719,167731,167737,167743,167750,167784,167811,167817,167855,167860-167864,167875,167942,167948,167966,168001,168035,168181,168189,168197-168198,168227,168280,168291,168316,168319-168320,168346,168352,168354,168361,168364,168512

Modified: llvm/branches/release_32/lib/CodeGen/LiveInterval.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_32/lib/CodeGen/LiveInterval.cpp?rev=168527&r1=168526&r2=168527&view=diff
==============================================================================
--- llvm/branches/release_32/lib/CodeGen/LiveInterval.cpp (original)
+++ llvm/branches/release_32/lib/CodeGen/LiveInterval.cpp Fri Nov 23 14:02:28 2012
@@ -59,8 +59,16 @@
     return VNI;
   }
   if (SlotIndex::isSameInstr(Def, I->start)) {
-    assert(I->start == Def && "Cannot insert def, already live");
-    assert(I->valno->def == Def && "Inconsistent existing value def");
+    assert(I->valno->def == I->start && "Inconsistent existing value def");
+
+    // It is possible to have both normal and early-clobber defs of the same
+    // register on an instruction. It doesn't make a lot of sense, but it is
+    // possible to specify in inline assembly.
+    //
+    // Just convert everything to early-clobber.
+    Def = std::min(Def, I->start);
+    if (Def != I->start)
+      I->start = I->valno->def = Def;
     return I->valno;
   }
   assert(SlotIndex::isEarlierInstr(Def, I->start) && "Already live at def");

Modified: llvm/branches/release_32/test/CodeGen/X86/inline-asm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_32/test/CodeGen/X86/inline-asm.ll?rev=168527&r1=168526&r2=168527&view=diff
==============================================================================
--- llvm/branches/release_32/test/CodeGen/X86/inline-asm.ll (original)
+++ llvm/branches/release_32/test/CodeGen/X86/inline-asm.ll Fri Nov 23 14:02:28 2012
@@ -52,3 +52,10 @@
   %0 = call { i32, i32, i32, i32, i32 } asm sideeffect "", "=&r,=&r,=&r,=&r,=&q,r,~{ecx},~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %h) nounwind
   ret void
 }
+
+; Mix normal and EC defs of the same register.
+define i32 @pr14376() nounwind noinline {
+entry:
+  %asm = tail call i32 asm sideeffect "", "={ax},i,~{eax},~{flags},~{rax}"(i64 61) nounwind
+  ret i32 %asm
+}