[llvm-branch-commits] [llvm-branch] r168092 - in /llvm/branches/release_32: include/llvm/ADT/Triple.h lib/Support/Triple.cpp

[Guy Benyei]

Author: gbenyei
Date: Thu Nov 15 15:24:48 2012
New Revision: 168092

URL: http://llvm.org/viewvc/llvm-project?rev=168092&view=rev
Log:
Bugzilla bug 14357

Merge SPIR64 target from trunk - the 64bit counterpart of SPIR.

The new OpenCL SPIR extension spec will define separate SPIR for 32 and 64 bit architectures.

Modified:
    llvm/branches/release_32/include/llvm/ADT/Triple.h
    llvm/branches/release_32/lib/Support/Triple.cpp

Modified: llvm/branches/release_32/include/llvm/ADT/Triple.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_32/include/llvm/ADT/Triple.h?rev=168092&r1=168091&r2=168092&view=diff
==============================================================================
--- llvm/branches/release_32/include/llvm/ADT/Triple.h (original)
+++ llvm/branches/release_32/include/llvm/ADT/Triple.h Thu Nov 15 15:24:48 2012
@@ -66,7 +66,8 @@
     nvptx64, // NVPTX: 64-bit
     le32,    // le32: generic little-endian 32-bit CPU (PNaCl / Emscripten)
     amdil,   // amdil: amd IL
-    spir     // SPIR: standard portable IR for OpenCL
+    spir,    // SPIR: standard portable IR for OpenCL 32-bit version
+    spir64   // SPIR: standard portable IR for OpenCL 64-bit version
   };
   enum VendorType {
     UnknownVendor,

Modified: llvm/branches/release_32/lib/Support/Triple.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_32/lib/Support/Triple.cpp?rev=168092&r1=168091&r2=168092&view=diff
==============================================================================
--- llvm/branches/release_32/lib/Support/Triple.cpp (original)
+++ llvm/branches/release_32/lib/Support/Triple.cpp Thu Nov 15 15:24:48 2012
@@ -43,6 +43,7 @@
   case le32:    return "le32";
   case amdil:   return "amdil";
   case spir:    return "spir";
+  case spir64:  return "spir64";
   }
 
   llvm_unreachable("Invalid ArchType!");
@@ -85,6 +86,7 @@
   case le32:    return "le32";
   case amdil:   return "amdil";
   case spir:    return "spir";
+  case spir64:  return "spir";
   }
 }
 
@@ -177,6 +179,7 @@
     .Case("le32", le32)
     .Case("amdil", amdil)
     .Case("spir", spir)
+    .Case("spir64", spir64)
     .Default(UnknownArch);
 }
 
@@ -202,6 +205,7 @@
     .Case("le32", "le32")
     .Case("amdil", "amdil")
     .Case("spir", "spir")
+    .Case("spir64", "spir64")
     .Default(NULL);
 }
 
@@ -237,6 +241,7 @@
     .Case("le32", Triple::le32)
     .Case("amdil", Triple::amdil)
     .Case("spir", Triple::spir)
+    .Case("spir64", Triple::spir64)
     .Default(Triple::UnknownArch);
 }
 
@@ -650,7 +655,6 @@
 
 static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
   switch (Arch) {
-  case llvm::Triple::spir:
   case llvm::Triple::UnknownArch:
     return 0;
 
@@ -673,6 +677,7 @@
   case llvm::Triple::thumb:
   case llvm::Triple::x86:
   case llvm::Triple::xcore:
+  case llvm::Triple::spir:
     return 32;
 
   case llvm::Triple::mips64:
@@ -681,6 +686,7 @@
   case llvm::Triple::ppc64:
   case llvm::Triple::sparcv9:
   case llvm::Triple::x86_64:
+  case llvm::Triple::spir64:
     return 64;
   }
   llvm_unreachable("Invalid architecture value");
@@ -732,6 +738,7 @@
   case Triple::ppc64:     T.setArch(Triple::ppc);   break;
   case Triple::sparcv9:   T.setArch(Triple::sparc);   break;
   case Triple::x86_64:    T.setArch(Triple::x86);     break;
+  case Triple::spir64:    T.setArch(Triple::spir);    break;
   }
   return T;
 }
@@ -754,7 +761,7 @@
     T.setArch(UnknownArch);
     break;
 
-  case Triple::spir:
+  case Triple::spir64:
   case Triple::mips64:
   case Triple::mips64el:
   case Triple::nvptx64:
@@ -770,6 +777,7 @@
   case Triple::ppc:     T.setArch(Triple::ppc64);     break;
   case Triple::sparc:   T.setArch(Triple::sparcv9);   break;
   case Triple::x86:     T.setArch(Triple::x86_64);    break;
+  case Triple::spir:    T.setArch(Triple::spir64);    break;
   }
   return T;
 }