[llvm-branch-commits] [llvm-branch] r113316 - in /llvm/branches/Apple/Morbo: lib/Transforms/Scalar/ScalarReplAggregates.cpp test/Transforms/ScalarRepl/vector_promote.ll
Dale Johannesen
dalej at apple.com
Tue Sep 7 17:09:15 PDT 2010
Author: johannes
Date: Tue Sep 7 19:09:15 2010
New Revision: 113316
URL: http://llvm.org/viewvc/llvm-project?rev=113316&view=rev
Log:
--- Merging r112696 into '.':
U test/Transforms/ScalarRepl/vector_promote.ll
U lib/Transforms/Scalar/ScalarReplAggregates.cpp
Modified:
llvm/branches/Apple/Morbo/lib/Transforms/Scalar/ScalarReplAggregates.cpp
llvm/branches/Apple/Morbo/test/Transforms/ScalarRepl/vector_promote.ll
Modified: llvm/branches/Apple/Morbo/lib/Transforms/Scalar/ScalarReplAggregates.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Transforms/Scalar/ScalarReplAggregates.cpp?rev=113316&r1=113315&r2=113316&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Transforms/Scalar/ScalarReplAggregates.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Transforms/Scalar/ScalarReplAggregates.cpp Tue Sep 7 19:09:15 2010
@@ -216,6 +216,21 @@
return false;
}
+/// IsVerbotenVectorType - Return true if this is a vector type ScalarRepl isn't
+/// allowed to form. We do this to avoid MMX types, which is a complete hack,
+/// but is required until the backend is fixed.
+static bool IsVerbotenVectorType(const VectorType *VTy) {
+ // Reject all the MMX vector types.
+ switch (VTy->getNumElements()) {
+ default: return false;
+ case 1: return VTy->getElementType()->isIntegerTy(64);
+ case 2: return VTy->getElementType()->isIntegerTy(32) ||
+ VTy->getElementType()->isFloatTy();
+ case 4: return VTy->getElementType()->isIntegerTy(16);
+ case 8: return VTy->getElementType()->isIntegerTy(8);
+ }
+}
+
// performScalarRepl - This algorithm is a simple worklist driven algorithm,
// which runs on all of the malloc/alloca instructions in the function, removing
// them if they are only used by getelementptr instructions.
@@ -302,7 +317,8 @@
// random stuff that doesn't use vectors (e.g. <9 x double>) because then
// we just get a lot of insert/extracts. If at least one vector is
// involved, then we probably really do have a union of vector/array.
- if (VectorTy && VectorTy->isVectorTy() && HadAVector) {
+ if (VectorTy && VectorTy->isVectorTy() && HadAVector &&
+ !IsVerbotenVectorType(cast<VectorType>(VectorTy))) {
DEBUG(dbgs() << "CONVERT TO VECTOR: " << *AI << "\n TYPE = "
<< *VectorTy << '\n');
@@ -1098,6 +1114,12 @@
/// HasPadding - Return true if the specified type has any structure or
/// alignment padding, false otherwise.
static bool HasPadding(const Type *Ty, const TargetData &TD) {
+ if (const ArrayType *ATy = dyn_cast<ArrayType>(Ty))
+ return HasPadding(ATy->getElementType(), TD);
+
+ if (const VectorType *VTy = dyn_cast<VectorType>(Ty))
+ return HasPadding(VTy->getElementType(), TD);
+
if (const StructType *STy = dyn_cast<StructType>(Ty)) {
const StructLayout *SL = TD.getStructLayout(STy);
unsigned PrevFieldBitOffset = 0;
@@ -1127,12 +1149,8 @@
if (PrevFieldEnd < SL->getSizeInBits())
return true;
}
-
- } else if (const ArrayType *ATy = dyn_cast<ArrayType>(Ty)) {
- return HasPadding(ATy->getElementType(), TD);
- } else if (const VectorType *VTy = dyn_cast<VectorType>(Ty)) {
- return HasPadding(VTy->getElementType(), TD);
}
+
return TD.getTypeSizeInBits(Ty) != TD.getTypeAllocSizeInBits(Ty);
}
Modified: llvm/branches/Apple/Morbo/test/Transforms/ScalarRepl/vector_promote.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/test/Transforms/ScalarRepl/vector_promote.ll?rev=113316&r1=113315&r2=113316&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/test/Transforms/ScalarRepl/vector_promote.ll (original)
+++ llvm/branches/Apple/Morbo/test/Transforms/ScalarRepl/vector_promote.ll Tue Sep 7 19:09:15 2010
@@ -63,3 +63,17 @@
ret i32 %tmp
}
+
+;; should not turn into <1 x i64> - It is a banned MMX datatype.
+;; rdar://8380055
+define i64 @test6(<2 x float> %X) {
+ %X_addr = alloca <2 x float>
+ store <2 x float> %X, <2 x float>* %X_addr
+ %P = bitcast <2 x float>* %X_addr to i64*
+ %tmp = load i64* %P
+ ret i64 %tmp
+; CHECK: @test6
+; CHECK-NEXT: bitcast <2 x float> %X to i64
+; CHECK-NEXT: ret i64
+}
+
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