[llvm-branch-commits] [llvm-branch] r113315 - /llvm/branches/Apple/Morbo/lib/Target/X86/X86ISelLowering.cpp

Dale Johannesen dalej at apple.com
Tue Sep 7 17:07:33 PDT 2010


Author: johannes
Date: Tue Sep  7 19:07:33 2010
New Revision: 113315

URL: http://llvm.org/viewvc/llvm-project?rev=113315&view=rev
Log:
--- Merging r107600 into '.':
A    test/CodeGen/X86/v2f32.ll
U    lib/Target/X86/X86ISelLowering.cpp


Modified:
    llvm/branches/Apple/Morbo/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/branches/Apple/Morbo/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/X86/X86ISelLowering.cpp?rev=113315&r1=113314&r2=113315&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/X86/X86ISelLowering.cpp Tue Sep  7 19:07:33 2010
@@ -633,7 +633,12 @@
     addRegisterClass(MVT::v8i8,  X86::VR64RegisterClass);
     addRegisterClass(MVT::v4i16, X86::VR64RegisterClass);
     addRegisterClass(MVT::v2i32, X86::VR64RegisterClass);
-    addRegisterClass(MVT::v2f32, X86::VR64RegisterClass);
+    
+    // FIXME: v2f32 isn't an MMX type.  We currently claim that it is legal
+    // because of some ABI issue, but this isn't the right fix.
+    bool IsV2F32Legal = !Subtarget->is64Bit();
+    if (IsV2F32Legal)
+      addRegisterClass(MVT::v2f32, X86::VR64RegisterClass);
     addRegisterClass(MVT::v1i64, X86::VR64RegisterClass);
 
     setOperationAction(ISD::ADD,                MVT::v8i8,  Legal);
@@ -679,14 +684,17 @@
     AddPromotedToType (ISD::LOAD,               MVT::v4i16, MVT::v1i64);
     setOperationAction(ISD::LOAD,               MVT::v2i32, Promote);
     AddPromotedToType (ISD::LOAD,               MVT::v2i32, MVT::v1i64);
-    setOperationAction(ISD::LOAD,               MVT::v2f32, Promote);
-    AddPromotedToType (ISD::LOAD,               MVT::v2f32, MVT::v1i64);
+    if (IsV2F32Legal) {
+      setOperationAction(ISD::LOAD,             MVT::v2f32, Promote);
+      AddPromotedToType (ISD::LOAD,             MVT::v2f32, MVT::v1i64);
+    }
     setOperationAction(ISD::LOAD,               MVT::v1i64, Legal);
 
     setOperationAction(ISD::BUILD_VECTOR,       MVT::v8i8,  Custom);
     setOperationAction(ISD::BUILD_VECTOR,       MVT::v4i16, Custom);
     setOperationAction(ISD::BUILD_VECTOR,       MVT::v2i32, Custom);
-    setOperationAction(ISD::BUILD_VECTOR,       MVT::v2f32, Custom);
+    if (IsV2F32Legal)
+      setOperationAction(ISD::BUILD_VECTOR,     MVT::v2f32, Custom);
     setOperationAction(ISD::BUILD_VECTOR,       MVT::v1i64, Custom);
 
     setOperationAction(ISD::VECTOR_SHUFFLE,     MVT::v8i8,  Custom);
@@ -694,7 +702,8 @@
     setOperationAction(ISD::VECTOR_SHUFFLE,     MVT::v2i32, Custom);
     setOperationAction(ISD::VECTOR_SHUFFLE,     MVT::v1i64, Custom);
 
-    setOperationAction(ISD::SCALAR_TO_VECTOR,   MVT::v2f32, Custom);
+    if (IsV2F32Legal)
+      setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v2f32, Custom);
     setOperationAction(ISD::SCALAR_TO_VECTOR,   MVT::v8i8,  Custom);
     setOperationAction(ISD::SCALAR_TO_VECTOR,   MVT::v4i16, Custom);
     setOperationAction(ISD::SCALAR_TO_VECTOR,   MVT::v1i64, Custom);
@@ -713,7 +722,8 @@
       setOperationAction(ISD::BIT_CONVERT,        MVT::v8i8,  Custom);
       setOperationAction(ISD::BIT_CONVERT,        MVT::v4i16, Custom);
       setOperationAction(ISD::BIT_CONVERT,        MVT::v2i32, Custom);
-      setOperationAction(ISD::BIT_CONVERT,        MVT::v2f32, Custom);
+      if (IsV2F32Legal)
+        setOperationAction(ISD::BIT_CONVERT,      MVT::v2f32, Custom);
       setOperationAction(ISD::BIT_CONVERT,        MVT::v1i64, Custom);
     }
   }





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