[llvm-branch-commits] [llvm-branch] r95944 - in /llvm/branches/Apple/Hermes: lib/CodeGen/SimpleRegisterCoalescing.cpp test/CodeGen/Thumb2/cross-rc-coalescing-2.ll test/CodeGen/X86/2008-07-11-SpillerBug.ll test/CodeGen/X86/pr1505b.ll test/CodeGen/X86/pr3495.ll test/CodeGen/X86/stack-color-with-reg.ll test/CodeGen/X86/twoaddr-coalesce.ll
Jakob Stoklund Olesen
stoklund at 2pi.dk
Thu Feb 11 16:16:47 PST 2010
Author: stoklund
Date: Thu Feb 11 18:16:47 2010
New Revision: 95944
URL: http://llvm.org/viewvc/llvm-project?rev=95944&view=rev
Log:
--- Merging r95917 into '.':
U lib/CodeGen/SimpleRegisterCoalescing.cpp
$ svn merge -c 95921 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r95921 into '.':
G lib/CodeGen/SimpleRegisterCoalescing.cpp
$ svn merge -c 95938 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r95938 into '.':
U test/CodeGen/X86/stack-color-with-reg.ll
U test/CodeGen/X86/pr1505b.ll
U test/CodeGen/X86/2008-07-11-SpillerBug.ll
U test/CodeGen/X86/pr3495.ll
U test/CodeGen/X86/twoaddr-coalesce.ll
U test/CodeGen/Thumb2/cross-rc-coalescing-2.ll
G lib/CodeGen/SimpleRegisterCoalescing.cpp
Modified:
llvm/branches/Apple/Hermes/lib/CodeGen/SimpleRegisterCoalescing.cpp
llvm/branches/Apple/Hermes/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll
llvm/branches/Apple/Hermes/test/CodeGen/X86/2008-07-11-SpillerBug.ll
llvm/branches/Apple/Hermes/test/CodeGen/X86/pr1505b.ll
llvm/branches/Apple/Hermes/test/CodeGen/X86/pr3495.ll
llvm/branches/Apple/Hermes/test/CodeGen/X86/stack-color-with-reg.ll
llvm/branches/Apple/Hermes/test/CodeGen/X86/twoaddr-coalesce.ll
Modified: llvm/branches/Apple/Hermes/lib/CodeGen/SimpleRegisterCoalescing.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=95944&r1=95943&r2=95944&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/CodeGen/SimpleRegisterCoalescing.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/CodeGen/SimpleRegisterCoalescing.cpp Thu Feb 11 18:16:47 2010
@@ -1148,12 +1148,14 @@
LiveInterval &SmallInt = li_->getInterval(SmallReg);
unsigned LargeSize = li_->getApproximateInstructionCount(LargeInt);
unsigned SmallSize = li_->getApproximateInstructionCount(SmallInt);
- if (SmallSize > Threshold || LargeSize > Threshold)
- if ((float)std::distance(mri_->use_nodbg_begin(SmallReg),
- mri_->use_nodbg_end()) / SmallSize <
- (float)std::distance(mri_->use_nodbg_begin(LargeReg),
- mri_->use_nodbg_end()) / LargeSize)
+ if (LargeSize > Threshold) {
+ unsigned SmallUses = std::distance(mri_->use_nodbg_begin(SmallReg),
+ mri_->use_nodbg_end());
+ unsigned LargeUses = std::distance(mri_->use_nodbg_begin(LargeReg),
+ mri_->use_nodbg_end());
+ if (SmallUses*LargeSize < LargeUses*SmallSize)
return false;
+ }
return true;
}
@@ -1561,7 +1563,10 @@
(isExtSubReg || DstRC->isASubClass()) &&
!isWinToJoinCrossClass(LargeReg, SmallReg,
allocatableRCRegs_[NewRC].count())) {
- DEBUG(dbgs() << "\tSrc/Dest are different register classes.\n");
+ DEBUG(dbgs() << "\tSrc/Dest are different register classes: "
+ << SrcRC->getName() << "/"
+ << DstRC->getName() << " -> "
+ << NewRC->getName() << ".\n");
// Allow the coalescer to try again in case either side gets coalesced to
// a physical register that's compatible with the other side. e.g.
// r1024 = MOV32to32_ r1025
Modified: llvm/branches/Apple/Hermes/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll?rev=95944&r1=95943&r2=95944&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll (original)
+++ llvm/branches/Apple/Hermes/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll Thu Feb 11 18:16:47 2010
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | grep vmov.f32 | count 7
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | grep vmov.f32 | count 3
define arm_apcscc void @fht(float* nocapture %fz, i16 signext %n) nounwind {
entry:
Modified: llvm/branches/Apple/Hermes/test/CodeGen/X86/2008-07-11-SpillerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/test/CodeGen/X86/2008-07-11-SpillerBug.ll?rev=95944&r1=95943&r2=95944&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/test/CodeGen/X86/2008-07-11-SpillerBug.ll (original)
+++ llvm/branches/Apple/Hermes/test/CodeGen/X86/2008-07-11-SpillerBug.ll Thu Feb 11 18:16:47 2010
@@ -1,9 +1,7 @@
; RUN: llc < %s -march=x86 -relocation-model=static -disable-fp-elim -post-RA-scheduler=false -asm-verbose=0 | FileCheck %s
; PR2536
-
-; CHECK: movw %cx
-; CHECK-NEXT: andl $65534, %
+; CHECK: andl $65534, %
; CHECK-NEXT: movl %
; CHECK-NEXT: movl $17
Modified: llvm/branches/Apple/Hermes/test/CodeGen/X86/pr1505b.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/test/CodeGen/X86/pr1505b.ll?rev=95944&r1=95943&r2=95944&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/test/CodeGen/X86/pr1505b.ll (original)
+++ llvm/branches/Apple/Hermes/test/CodeGen/X86/pr1505b.ll Thu Feb 11 18:16:47 2010
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mcpu=i486 | grep fstpl | count 4
-; RUN: llc < %s -mcpu=i486 | grep fstps | count 3
+; RUN: llc < %s -mcpu=i486 | grep fstpl | count 5
+; RUN: llc < %s -mcpu=i486 | grep fstps | count 2
; PR1505
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
Modified: llvm/branches/Apple/Hermes/test/CodeGen/X86/pr3495.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/test/CodeGen/X86/pr3495.ll?rev=95944&r1=95943&r2=95944&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/test/CodeGen/X86/pr3495.ll (original)
+++ llvm/branches/Apple/Hermes/test/CodeGen/X86/pr3495.ll Thu Feb 11 18:16:47 2010
@@ -1,6 +1,6 @@
; RUN: llc < %s -march=x86 -stats |& grep {Number of loads added} | grep 2
; RUN: llc < %s -march=x86 -stats |& grep {Number of register spills} | grep 1
-; RUN: llc < %s -march=x86 -stats |& grep {Number of machine instrs printed} | grep 38
+; RUN: llc < %s -march=x86 -stats |& grep {Number of machine instrs printed} | grep 37
; PR3495
; The loop reversal kicks in once here, resulting in one fewer instruction.
Modified: llvm/branches/Apple/Hermes/test/CodeGen/X86/stack-color-with-reg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/test/CodeGen/X86/stack-color-with-reg.ll?rev=95944&r1=95943&r2=95944&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/test/CodeGen/X86/stack-color-with-reg.ll (original)
+++ llvm/branches/Apple/Hermes/test/CodeGen/X86/stack-color-with-reg.ll Thu Feb 11 18:16:47 2010
@@ -1,5 +1,5 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs -stats -info-output-file - > %t
-; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 14
+; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 8
type { [62 x %struct.Bitvec*] } ; type %0
type { i8* } ; type %1
Modified: llvm/branches/Apple/Hermes/test/CodeGen/X86/twoaddr-coalesce.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/test/CodeGen/X86/twoaddr-coalesce.ll?rev=95944&r1=95943&r2=95944&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/test/CodeGen/X86/twoaddr-coalesce.ll (original)
+++ llvm/branches/Apple/Hermes/test/CodeGen/X86/twoaddr-coalesce.ll Thu Feb 11 18:16:47 2010
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep mov | count 5
+; RUN: llc < %s -march=x86 | grep mov | count 4
; rdar://6523745
@"\01LC" = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
More information about the llvm-branch-commits
mailing list