[llvm-branch-commits] [llvm-branch] r95750 - /llvm/branches/Apple/Hermes/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

[Evan Cheng]

Author: evancheng
Date: Tue Feb  9 19:32:16 2010
New Revision: 95750

URL: http://llvm.org/viewvc/llvm-project?rev=95750&view=rev
Log:
Merge 95746.

Modified:
    llvm/branches/Apple/Hermes/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Modified: llvm/branches/Apple/Hermes/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=95750&r1=95749&r2=95750&view=diff

==============================================================================
--- llvm/branches/Apple/Hermes/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Tue Feb  9 19:32:16 2010
@@ -131,6 +131,17 @@
       }
     }
 
+    /// areValueTypesLegal - Return true if types of all the values are legal.
+    bool areValueTypesLegal() {
+      for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
+        EVT RegisterVT = RegVTs[Value];
+        if (!TLI->isTypeLegal(RegisterVT))
+          return false;
+      }
+      return true;
+    }
+
+
     /// append - Add the specified values to this one.
     void append(const RegsForValue &RHS) {
       TLI = RHS.TLI;
@@ -5513,7 +5524,8 @@
              "Don't know how to handle indirect register inputs yet!");
 
       // Copy the input into the appropriate registers.
-      if (OpInfo.AssignedRegs.Regs.empty()) {
+      if (OpInfo.AssignedRegs.Regs.empty() ||
+          !OpInfo.AssignedRegs.areValueTypesLegal()) {
         llvm_report_error("Couldn't allocate input reg for"
                           " constraint '"+ OpInfo.ConstraintCode +"'!");
       }