[llvm-branch-commits] [llvm-branch] r95698 - in /llvm/branches/Apple/Hermes/lib/Target/ARM: ARMInstrThumb.td Thumb2SizeReduction.cpp

[Jim Grosbach]

Author: grosbach
Date: Tue Feb  9 15:56:07 2010
New Revision: 95698

URL: http://llvm.org/viewvc/llvm-project?rev=95698&view=rev
Log:
Merge 95686

Modified:
    llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrThumb.td
    llvm/branches/Apple/Hermes/lib/Target/ARM/Thumb2SizeReduction.cpp

Modified: llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrThumb.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrThumb.td?rev=95698&r1=95697&r2=95698&view=diff

==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrThumb.td (original)
+++ llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrThumb.td Tue Feb  9 15:56:07 2010
@@ -775,7 +775,7 @@
                     "mov", "\t$dst, $rhs", []>,
               T1Special<{1,0,?,?}>;
 
-def tMOVCCi : T1pIt<(outs GPR:$dst), (ins GPR:$lhs, i32imm:$rhs), IIC_iCMOVi,
+def tMOVCCi : T1pIt<(outs tGPR:$dst), (ins tGPR:$lhs, i32imm:$rhs), IIC_iCMOVi,
                     "mov", "\t$dst, $rhs", []>,
               T1General<{1,0,0,?,?}>;
 

Modified: llvm/branches/Apple/Hermes/lib/Target/ARM/Thumb2SizeReduction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/ARM/Thumb2SizeReduction.cpp?rev=95698&r1=95697&r2=95698&view=diff

==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/ARM/Thumb2SizeReduction.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/Target/ARM/Thumb2SizeReduction.cpp Tue Feb  9 15:56:07 2010
@@ -83,7 +83,7 @@
     // FIXME: Do we need the 16-bit 'S' variant?
     { ARM::t2MOVr,ARM::tMOVgpr2gpr,0,            0,   0,    0,   0,  1,0, 0 },
     { ARM::t2MOVCCr,0,            ARM::tMOVCCr,  0,   0,    0,   0,  0,1, 0 },
-    { ARM::t2MOVCCi,0,            ARM::tMOVCCi,  0,   8,    0,   0,  0,1, 0 },
+    { ARM::t2MOVCCi,0,            ARM::tMOVCCi,  0,   8,    0,   1,  0,1, 0 },
     { ARM::t2MUL,   0,            ARM::tMUL,     0,   0,    0,   1,  0,0, 0 },
     { ARM::t2MVNr,  ARM::tMVN,    0,             0,   0,    1,   0,  0,0, 0 },
     { ARM::t2ORRrr, 0,            ARM::tORR,     0,   0,    0,   1,  0,0, 0 },