[llvm-branch-commits] [llvm-branch] r83220 - in /llvm/branches/Apple/Leela: lib/CodeGen/ lib/Target/ARM/ test/CodeGen/ARM/ test/CodeGen/Thumb2/
Bob Wilson
bob.wilson at apple.com
Thu Oct 1 15:28:08 PDT 2009
Author: bwilson
Date: Thu Oct 1 17:28:08 2009
New Revision: 83220
URL: http://llvm.org/viewvc/llvm-project?rev=83220&view=rev
Log:
$ svn merge -c 83218 https://bwilson@llvm.org/svn/llvm-project/llvm/trunk
--- Merging r83218 into '.':
U test/CodeGen/ARM/fdivs.ll
U test/CodeGen/ARM/fmacs.ll
U test/CodeGen/ARM/fp_convert.ll
U test/CodeGen/ARM/fnmuls.ll
U test/CodeGen/ARM/fsubs.ll
U test/CodeGen/ARM/fnmscs.ll
U test/CodeGen/ARM/fmuls.ll
U test/CodeGen/ARM/fnegs.ll
U test/CodeGen/ARM/fmscs.ll
U test/CodeGen/ARM/fadds.ll
U test/CodeGen/ARM/fnmacs.ll
U test/CodeGen/ARM/fabss.ll
U test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll
U test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll
U test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll
U test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll
U test/CodeGen/Thumb2/2009-08-07-NeonFPBug.ll
U test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll
U lib/Target/ARM/ARMSubtarget.cpp
U lib/Target/ARM/ARM.td
U lib/CodeGen/PostRASchedulerList.cpp
Modified:
llvm/branches/Apple/Leela/lib/CodeGen/PostRASchedulerList.cpp
llvm/branches/Apple/Leela/lib/Target/ARM/ARM.td
llvm/branches/Apple/Leela/lib/Target/ARM/ARMSubtarget.cpp
llvm/branches/Apple/Leela/test/CodeGen/ARM/fabss.ll
llvm/branches/Apple/Leela/test/CodeGen/ARM/fadds.ll
llvm/branches/Apple/Leela/test/CodeGen/ARM/fdivs.ll
llvm/branches/Apple/Leela/test/CodeGen/ARM/fmacs.ll
llvm/branches/Apple/Leela/test/CodeGen/ARM/fmscs.ll
llvm/branches/Apple/Leela/test/CodeGen/ARM/fmuls.ll
llvm/branches/Apple/Leela/test/CodeGen/ARM/fnegs.ll
llvm/branches/Apple/Leela/test/CodeGen/ARM/fnmacs.ll
llvm/branches/Apple/Leela/test/CodeGen/ARM/fnmscs.ll
llvm/branches/Apple/Leela/test/CodeGen/ARM/fnmuls.ll
llvm/branches/Apple/Leela/test/CodeGen/ARM/fp_convert.ll
llvm/branches/Apple/Leela/test/CodeGen/ARM/fsubs.ll
llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll
llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll
llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll
llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll
llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll
llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-07-NeonFPBug.ll
Modified: llvm/branches/Apple/Leela/lib/CodeGen/PostRASchedulerList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/lib/CodeGen/PostRASchedulerList.cpp?rev=83220&r1=83219&r2=83220&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/lib/CodeGen/PostRASchedulerList.cpp (original)
+++ llvm/branches/Apple/Leela/lib/CodeGen/PostRASchedulerList.cpp Thu Oct 1 17:28:08 2009
@@ -53,7 +53,7 @@
static cl::opt<bool>
EnablePostRAScheduler("post-RA-scheduler",
cl::desc("Enable scheduling after register allocation"),
- cl::init(false));
+ cl::init(false), cl::Hidden);
static cl::opt<bool>
EnableAntiDepBreaking("break-anti-dependencies",
cl::desc("Break post-RA scheduling anti-dependencies"),
Modified: llvm/branches/Apple/Leela/lib/Target/ARM/ARM.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/lib/Target/ARM/ARM.td?rev=83220&r1=83219&r2=83220&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/lib/Target/ARM/ARM.td (original)
+++ llvm/branches/Apple/Leela/lib/Target/ARM/ARM.td Thu Oct 1 17:28:08 2009
@@ -40,9 +40,6 @@
"Enable NEON instructions">;
def FeatureThumb2 : SubtargetFeature<"thumb2", "ThumbMode", "Thumb2",
"Enable Thumb2 instructions">;
-def FeatureNEONFP : SubtargetFeature<"neonfp", "UseNEONForSinglePrecisionFP",
- "true",
- "Use NEON for single-precision FP">;
//===----------------------------------------------------------------------===//
// ARM Processors supported.
@@ -105,7 +102,7 @@
// V7 Processors.
def : Processor<"cortex-a8", CortexA8Itineraries,
- [ArchV7A, FeatureThumb2, FeatureNEON, FeatureNEONFP]>;
+ [ArchV7A, FeatureThumb2, FeatureNEON]>;
def : ProcNoItin<"cortex-a9", [ArchV7A, FeatureThumb2, FeatureNEON]>;
//===----------------------------------------------------------------------===//
Modified: llvm/branches/Apple/Leela/lib/Target/ARM/ARMSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/lib/Target/ARM/ARMSubtarget.cpp?rev=83220&r1=83219&r2=83220&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/lib/Target/ARM/ARMSubtarget.cpp (original)
+++ llvm/branches/Apple/Leela/lib/Target/ARM/ARMSubtarget.cpp Thu Oct 1 17:28:08 2009
@@ -21,12 +21,16 @@
static cl::opt<bool>
ReserveR9("arm-reserve-r9", cl::Hidden,
cl::desc("Reserve R9, making it unavailable as GPR"));
+static cl::opt<bool>
+UseNEONFP("arm-use-neon-fp",
+ cl::desc("Use NEON for single-precision FP"),
+ cl::init(false), cl::Hidden);
ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &FS,
bool isThumb)
: ARMArchVersion(V4T)
, ARMFPUType(None)
- , UseNEONForSinglePrecisionFP(false)
+ , UseNEONForSinglePrecisionFP(UseNEONFP)
, IsThumb(isThumb)
, ThumbMode(Thumb1)
, PostRAScheduler(false)
@@ -97,6 +101,8 @@
// Set CPU specific features.
if (CPUString == "cortex-a8") {
PostRAScheduler = true;
+ if (UseNEONFP.getPosition() == 0)
+ UseNEONForSinglePrecisionFP = true;
}
}
Modified: llvm/branches/Apple/Leela/test/CodeGen/ARM/fabss.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/test/CodeGen/ARM/fabss.ll?rev=83220&r1=83219&r2=83220&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/test/CodeGen/ARM/fabss.ll (original)
+++ llvm/branches/Apple/Leela/test/CodeGen/ARM/fabss.ll Thu Oct 1 17:28:08 2009
@@ -1,6 +1,6 @@
; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fabss\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
-; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | grep -E {vabs.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
-; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | grep -E {fabss\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vabs.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {fabss\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vabs.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fabss\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
Modified: llvm/branches/Apple/Leela/test/CodeGen/ARM/fadds.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/test/CodeGen/ARM/fadds.ll?rev=83220&r1=83219&r2=83220&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/test/CodeGen/ARM/fadds.ll (original)
+++ llvm/branches/Apple/Leela/test/CodeGen/ARM/fadds.ll Thu Oct 1 17:28:08 2009
@@ -1,6 +1,6 @@
; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fadds\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
-; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | grep -E {vadd.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
-; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | grep -E {fadds\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vadd.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {fadds\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vadd.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fadds\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
Modified: llvm/branches/Apple/Leela/test/CodeGen/ARM/fdivs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/test/CodeGen/ARM/fdivs.ll?rev=83220&r1=83219&r2=83220&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/test/CodeGen/ARM/fdivs.ll (original)
+++ llvm/branches/Apple/Leela/test/CodeGen/ARM/fdivs.ll Thu Oct 1 17:28:08 2009
@@ -1,6 +1,6 @@
; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
-; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
-; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
Modified: llvm/branches/Apple/Leela/test/CodeGen/ARM/fmacs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/test/CodeGen/ARM/fmacs.ll?rev=83220&r1=83219&r2=83220&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/test/CodeGen/ARM/fmacs.ll (original)
+++ llvm/branches/Apple/Leela/test/CodeGen/ARM/fmacs.ll Thu Oct 1 17:28:08 2009
@@ -1,6 +1,6 @@
; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
-; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | grep -E {vmla.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
-; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | grep -E {fmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vmla.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {fmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vmla.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
Modified: llvm/branches/Apple/Leela/test/CodeGen/ARM/fmscs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/test/CodeGen/ARM/fmscs.ll?rev=83220&r1=83219&r2=83220&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/test/CodeGen/ARM/fmscs.ll (original)
+++ llvm/branches/Apple/Leela/test/CodeGen/ARM/fmscs.ll Thu Oct 1 17:28:08 2009
@@ -1,6 +1,6 @@
; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
-; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
-; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
Modified: llvm/branches/Apple/Leela/test/CodeGen/ARM/fmuls.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/test/CodeGen/ARM/fmuls.ll?rev=83220&r1=83219&r2=83220&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/test/CodeGen/ARM/fmuls.ll (original)
+++ llvm/branches/Apple/Leela/test/CodeGen/ARM/fmuls.ll Thu Oct 1 17:28:08 2009
@@ -1,6 +1,6 @@
; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
-; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | grep -E {vmul.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
-; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | grep -E {fmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vmul.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {fmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vmul.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
Modified: llvm/branches/Apple/Leela/test/CodeGen/ARM/fnegs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/test/CodeGen/ARM/fnegs.ll?rev=83220&r1=83219&r2=83220&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/test/CodeGen/ARM/fnegs.ll (original)
+++ llvm/branches/Apple/Leela/test/CodeGen/ARM/fnegs.ll Thu Oct 1 17:28:08 2009
@@ -1,6 +1,6 @@
; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fnegs\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2
-; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | grep -E {vneg.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 2
-; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | grep -E {fnegs\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vneg.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 2
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {fnegs\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2
; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vneg.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 2
; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fnegs\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2
Modified: llvm/branches/Apple/Leela/test/CodeGen/ARM/fnmacs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/test/CodeGen/ARM/fnmacs.ll?rev=83220&r1=83219&r2=83220&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/test/CodeGen/ARM/fnmacs.ll (original)
+++ llvm/branches/Apple/Leela/test/CodeGen/ARM/fnmacs.ll Thu Oct 1 17:28:08 2009
@@ -1,6 +1,6 @@
; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fnmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
-; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | grep -E {vmls.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
-; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | grep -E {fnmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vmls.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {fnmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vmls.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fnmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
Modified: llvm/branches/Apple/Leela/test/CodeGen/ARM/fnmscs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/test/CodeGen/ARM/fnmscs.ll?rev=83220&r1=83219&r2=83220&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/test/CodeGen/ARM/fnmscs.ll (original)
+++ llvm/branches/Apple/Leela/test/CodeGen/ARM/fnmscs.ll Thu Oct 1 17:28:08 2009
@@ -1,6 +1,6 @@
; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s
-; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | FileCheck %s
-; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | FileCheck %s
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | FileCheck %s
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | FileCheck %s
; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s
; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s
Modified: llvm/branches/Apple/Leela/test/CodeGen/ARM/fnmuls.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/test/CodeGen/ARM/fnmuls.ll?rev=83220&r1=83219&r2=83220&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/test/CodeGen/ARM/fnmuls.ll (original)
+++ llvm/branches/Apple/Leela/test/CodeGen/ARM/fnmuls.ll Thu Oct 1 17:28:08 2009
@@ -1,7 +1,7 @@
; XFAIL: *
; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s
-; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | FileCheck %s
-; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | FileCheck %s
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | FileCheck %s
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | FileCheck %s
; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s
; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s
Modified: llvm/branches/Apple/Leela/test/CodeGen/ARM/fp_convert.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/test/CodeGen/ARM/fp_convert.ll?rev=83220&r1=83219&r2=83220&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/test/CodeGen/ARM/fp_convert.ll (original)
+++ llvm/branches/Apple/Leela/test/CodeGen/ARM/fp_convert.ll Thu Oct 1 17:28:08 2009
@@ -1,6 +1,6 @@
; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
-; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | FileCheck %s -check-prefix=NEON
-; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | FileCheck %s -check-prefix=VFP2
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | FileCheck %s -check-prefix=NEON
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | FileCheck %s -check-prefix=VFP2
; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=NEON
; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=VFP2
Modified: llvm/branches/Apple/Leela/test/CodeGen/ARM/fsubs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/test/CodeGen/ARM/fsubs.ll?rev=83220&r1=83219&r2=83220&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/test/CodeGen/ARM/fsubs.ll (original)
+++ llvm/branches/Apple/Leela/test/CodeGen/ARM/fsubs.ll Thu Oct 1 17:28:08 2009
@@ -1,6 +1,6 @@
; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fsubs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
-; RUN: llc < %s -march=arm -mattr=+neon,+neonfp | grep -E {vsub.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
-; RUN: llc < %s -march=arm -mattr=+neon,-neonfp | grep -E {fsubs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vsub.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {fsubs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
define float @test(float %a, float %b) {
entry:
Modified: llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll?rev=83220&r1=83219&r2=83220&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll (original)
+++ llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll Thu Oct 1 17:28:08 2009
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+neon,+neonfp -relocation-model=pic -disable-fp-elim
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+neon -arm-use-neon-fp -relocation-model=pic -disable-fp-elim
type { %struct.GAP } ; type %0
type { i16, i8, i8 } ; type %1
Modified: llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll?rev=83220&r1=83219&r2=83220&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll (original)
+++ llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll Thu Oct 1 17:28:08 2009
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+neon,+neonfp -relocation-model=pic -disable-fp-elim -O3
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+neon -arm-use-neon-fp -relocation-model=pic -disable-fp-elim -O3
type { i16, i8, i8 } ; type %0
type { [2 x i32], [2 x i32] } ; type %1
Modified: llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll?rev=83220&r1=83219&r2=83220&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll (original)
+++ llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll Thu Oct 1 17:28:08 2009
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mattr=+neon,+neonfp
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mattr=+neon,+neonfp | grep fcpys | count 1
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mattr=+neon -arm-use-neon-fp
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mattr=+neon -arm-use-neon-fp | grep fcpys | count 1
; rdar://7117307
%struct.Hosp = type { i32, i32, i32, %struct.List, %struct.List, %struct.List, %struct.List }
Modified: llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll?rev=83220&r1=83219&r2=83220&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll (original)
+++ llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll Thu Oct 1 17:28:08 2009
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mattr=+neon,+neonfp
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mattr=+neon -arm-use-neon-fp
; rdar://7117307
%struct.Hosp = type { i32, i32, i32, %struct.List, %struct.List, %struct.List, %struct.List }
Modified: llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll?rev=83220&r1=83219&r2=83220&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll (original)
+++ llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll Thu Oct 1 17:28:08 2009
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mattr=+neon,+neonfp
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mattr=+neon -arm-use-neon-fp
; rdar://7117307
%struct.Hosp = type { i32, i32, i32, %struct.List, %struct.List, %struct.List, %struct.List }
Modified: llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-07-NeonFPBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-07-NeonFPBug.ll?rev=83220&r1=83219&r2=83220&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-07-NeonFPBug.ll (original)
+++ llvm/branches/Apple/Leela/test/CodeGen/Thumb2/2009-08-07-NeonFPBug.ll Thu Oct 1 17:28:08 2009
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -mcpu=cortex-a8 -mattr=+neonfp
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -mcpu=cortex-a8 -arm-use-neon-fp
%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
%struct.JHUFF_TBL = type { [17 x i8], [256 x i8], i32 }
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