[llvm-branch-commits] [llvm-branch] r88976 - in /llvm/branches/Apple/Leela-M1: lib/Target/X86/X86InstrInfo.cpp lib/Target/X86/X86InstrSSE.td test/CodeGen/X86/2009-11-16-UnfoldMemOpBug.ll

[Bill Wendling]

Author: void
Date: Mon Nov 16 16:06:54 2009
New Revision: 88976

URL: http://llvm.org/viewvc/llvm-project?rev=88976&view=rev
Log:
$ svn merge -c 88974 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r88974 into '.':
A    test/CodeGen/X86/2009-11-16-UnfoldMemOpBug.ll
U    lib/Target/X86/X86InstrSSE.td
U    lib/Target/X86/X86InstrInfo.cpp


Added:
    llvm/branches/Apple/Leela-M1/test/CodeGen/X86/2009-11-16-UnfoldMemOpBug.ll
      - copied unchanged from r88974, llvm/trunk/test/CodeGen/X86/2009-11-16-UnfoldMemOpBug.ll
Modified:
    llvm/branches/Apple/Leela-M1/lib/Target/X86/X86InstrInfo.cpp
    llvm/branches/Apple/Leela-M1/lib/Target/X86/X86InstrSSE.td

Modified: llvm/branches/Apple/Leela-M1/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela-M1/lib/Target/X86/X86InstrInfo.cpp?rev=88976&r1=88975&r2=88976&view=diff

==============================================================================
--- llvm/branches/Apple/Leela-M1/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/branches/Apple/Leela-M1/lib/Target/X86/X86InstrInfo.cpp Mon Nov 16 16:06:54 2009
@@ -794,6 +794,7 @@
     case X86::MOVSSrm:
     case X86::MOVSDrm:
     case X86::MOVAPSrm:
+    case X86::MOVUPSrm:
     case X86::MOVAPDrm:
     case X86::MOVDQArm:
     case X86::MMX_MOVD64rm:
@@ -1891,8 +1892,7 @@
                                   MachineInstr::mmo_iterator MMOBegin,
                                   MachineInstr::mmo_iterator MMOEnd,
                                   SmallVectorImpl<MachineInstr*> &NewMIs) const {
-  bool isAligned = (RI.getStackAlignment() >= 16) ||
-    RI.needsStackRealignment(MF);
+  bool isAligned = (*MMOBegin)->getAlignment() >= 16;
   unsigned Opc = getStoreRegOpcode(SrcReg, RC, isAligned, TM);
   DebugLoc DL = DebugLoc::getUnknownLoc();
   MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc));
@@ -1985,8 +1985,7 @@
                                  MachineInstr::mmo_iterator MMOBegin,
                                  MachineInstr::mmo_iterator MMOEnd,
                                  SmallVectorImpl<MachineInstr*> &NewMIs) const {
-  bool isAligned = (RI.getStackAlignment() >= 16) ||
-    RI.needsStackRealignment(MF);
+  bool isAligned = (*MMOBegin)->getAlignment() >= 16;
   unsigned Opc = getLoadRegOpcode(DestReg, RC, isAligned, TM);
   DebugLoc DL = DebugLoc::getUnknownLoc();
   MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg);
@@ -2563,17 +2562,16 @@
   MachineFunction &MF = DAG.getMachineFunction();
   if (FoldedLoad) {
     EVT VT = *RC->vt_begin();
-    bool isAligned = (RI.getStackAlignment() >= 16) ||
-      RI.needsStackRealignment(MF);
+    std::pair<MachineInstr::mmo_iterator,
+              MachineInstr::mmo_iterator> MMOs =
+      MF.extractLoadMemRefs(cast<MachineSDNode>(N)->memoperands_begin(),
+                            cast<MachineSDNode>(N)->memoperands_end());
+    bool isAligned = (*MMOs.first)->getAlignment() >= 16;
     Load = DAG.getMachineNode(getLoadRegOpcode(0, RC, isAligned, TM), dl,
                               VT, MVT::Other, &AddrOps[0], AddrOps.size());
     NewNodes.push_back(Load);
 
     // Preserve memory reference information.
-    std::pair<MachineInstr::mmo_iterator,
-              MachineInstr::mmo_iterator> MMOs =
-      MF.extractLoadMemRefs(cast<MachineSDNode>(N)->memoperands_begin(),
-                            cast<MachineSDNode>(N)->memoperands_end());
     cast<MachineSDNode>(Load)->setMemRefs(MMOs.first, MMOs.second);
   }
 
@@ -2601,8 +2599,11 @@
     AddrOps.pop_back();
     AddrOps.push_back(SDValue(NewNode, 0));
     AddrOps.push_back(Chain);
-    bool isAligned = (RI.getStackAlignment() >= 16) ||
-      RI.needsStackRealignment(MF);
+    std::pair<MachineInstr::mmo_iterator,
+              MachineInstr::mmo_iterator> MMOs =
+      MF.extractStoreMemRefs(cast<MachineSDNode>(N)->memoperands_begin(),
+                             cast<MachineSDNode>(N)->memoperands_end());
+    bool isAligned = (*MMOs.first)->getAlignment() >= 16;
     SDNode *Store = DAG.getMachineNode(getStoreRegOpcode(0, DstRC,
                                                          isAligned, TM),
                                        dl, MVT::Other,
@@ -2610,10 +2611,6 @@
     NewNodes.push_back(Store);
 
     // Preserve memory reference information.
-    std::pair<MachineInstr::mmo_iterator,
-              MachineInstr::mmo_iterator> MMOs =
-      MF.extractStoreMemRefs(cast<MachineSDNode>(N)->memoperands_begin(),
-                             cast<MachineSDNode>(N)->memoperands_end());
     cast<MachineSDNode>(Load)->setMemRefs(MMOs.first, MMOs.second);
   }
 

Modified: llvm/branches/Apple/Leela-M1/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela-M1/lib/Target/X86/X86InstrSSE.td?rev=88976&r1=88975&r2=88976&view=diff

==============================================================================
--- llvm/branches/Apple/Leela-M1/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/branches/Apple/Leela-M1/lib/Target/X86/X86InstrSSE.td Mon Nov 16 16:06:54 2009
@@ -706,7 +706,7 @@
 let neverHasSideEffects = 1 in
 def MOVUPSrr : PSI<0x10, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
                    "movups\t{$src, $dst|$dst, $src}", []>;
-let canFoldAsLoad = 1 in
+let canFoldAsLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in
 def MOVUPSrm : PSI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src),
                    "movups\t{$src, $dst|$dst, $src}",
                    [(set VR128:$dst, (loadv4f32 addr:$src))]>;