[llvm-branch-commits] [llvm-branch] r91199 - in /llvm/branches/Apple/Zoidberg/lib: CodeGen/ Target/ARM/ Target/Alpha/ Target/CellSPU/ Target/MSP430/ Target/Mips/ Target/PowerPC/ Target/SystemZ/ Target/X86/ Target/XCore/
Bill Wendling
isanbard at gmail.com
Fri Dec 11 17:28:10 PST 2009
Author: void
Date: Fri Dec 11 19:28:10 2009
New Revision: 91199
URL: http://llvm.org/viewvc/llvm-project?rev=91199&view=rev
Log:
Revert back to -r91185:91114.
Modified:
llvm/branches/Apple/Zoidberg/lib/CodeGen/BranchFolding.cpp
llvm/branches/Apple/Zoidberg/lib/CodeGen/MachineBasicBlock.cpp
llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMBaseInstrInfo.h
llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.cpp
llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.h
llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb1InstrInfo.cpp
llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb1InstrInfo.h
llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.cpp
llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.h
llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaInstrInfo.cpp
llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaInstrInfo.h
llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.cpp
llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.h
llvm/branches/Apple/Zoidberg/lib/Target/MSP430/MSP430InstrInfo.cpp
llvm/branches/Apple/Zoidberg/lib/Target/MSP430/MSP430InstrInfo.h
llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsInstrInfo.cpp
llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsInstrInfo.h
llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.h
llvm/branches/Apple/Zoidberg/lib/Target/SystemZ/SystemZInstrInfo.cpp
llvm/branches/Apple/Zoidberg/lib/Target/SystemZ/SystemZInstrInfo.h
llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.cpp
llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.h
llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreInstrInfo.cpp
llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreInstrInfo.h
Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/BranchFolding.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/BranchFolding.cpp?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/BranchFolding.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/BranchFolding.cpp Fri Dec 11 19:28:10 2009
@@ -1205,11 +1205,11 @@
}
}
- // If the prior block doesn't fall through into this block and if this block
- // doesn't fall through into some other block and it's not branching only to a
- // landing pad, then see if we can find a place to move this block where a
- // fall-through will happen.
- if (!PrevBB.canFallThrough() && !MBB->BranchesToLandingPad(MBB)) {
+ // If the prior block doesn't fall through into this block, and if this
+ // block doesn't fall through into some other block, see if we can find a
+ // place to move this block where a fall-through will happen.
+ if (!PrevBB.canFallThrough()) {
+
// Now we know that there was no fall-through into this block, check to
// see if it has a fall-through into its successor.
bool CurFallsThru = MBB->canFallThrough();
@@ -1221,31 +1221,28 @@
E = MBB->pred_end(); PI != E; ++PI) {
// Analyze the branch at the end of the pred.
MachineBasicBlock *PredBB = *PI;
- MachineFunction::iterator PredNextBB = PredBB; ++PredNextBB;
+ MachineFunction::iterator PredFallthrough = PredBB; ++PredFallthrough;
MachineBasicBlock *PredTBB, *PredFBB;
SmallVector<MachineOperand, 4> PredCond;
- if (PredBB != MBB && !PredBB->canFallThrough()
- && !TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true)
+ if (PredBB != MBB && !PredBB->canFallThrough() &&
+ !TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true)
&& (!CurFallsThru || !CurTBB || !CurFBB)
&& (!CurFallsThru || MBB->getNumber() >= PredBB->getNumber())) {
- // If the current block doesn't fall through, just move it. If the
- // current block can fall through and does not end with a conditional
- // branch, we need to append an unconditional jump to the (current)
- // next block. To avoid a possible compile-time infinite loop, move
- // blocks only backward in this case.
- //
- // Also, if there are already 2 branches here, we cannot add a third.
- // I.e. we have the case:
- //
- // Bcc next
- // B elsewhere
- // next:
+ // If the current block doesn't fall through, just move it.
+ // If the current block can fall through and does not end with a
+ // conditional branch, we need to append an unconditional jump to
+ // the (current) next block. To avoid a possible compile-time
+ // infinite loop, move blocks only backward in this case.
+ // Also, if there are already 2 branches here, we cannot add a third;
+ // this means we have the case
+ // Bcc next
+ // B elsewhere
+ // next:
if (CurFallsThru) {
- MachineBasicBlock *NextBB = MachineFunction::iterator(MBB);
+ MachineBasicBlock *NextBB = next(MachineFunction::iterator(MBB));
CurCond.clear();
TII->InsertBranch(*MBB, NextBB, 0, CurCond);
}
-
MBB->moveAfter(PredBB);
MadeChange = true;
goto ReoptimizeBlock;
Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/MachineBasicBlock.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/MachineBasicBlock.cpp?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/MachineBasicBlock.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/MachineBasicBlock.cpp Fri Dec 11 19:28:10 2009
@@ -457,9 +457,16 @@
SmallSet<const MachineBasicBlock*, 32> Visited;
const MachineBasicBlock *CurMBB = MBB;
- while (!CurMBB->isLandingPad()) {
- if (CurMBB->succ_size() != 1) break;
- if (!Visited.insert(CurMBB)) break;
+ while (!Visited.count(CurMBB) && !CurMBB->isLandingPad()) {
+ if (CurMBB->size() != 1 || CurMBB->succ_empty() || CurMBB->succ_size() != 1)
+ break;
+
+ const TargetInstrInfo *TII =
+ CurMBB->getParent()->getTarget().getInstrInfo();
+ if (!TII->isUnpredicatedTerminator(CurMBB->begin()))
+ break;
+
+ Visited.insert(CurMBB);
CurMBB = *CurMBB->succ_begin();
}
Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMBaseInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMBaseInstrInfo.h?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMBaseInstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMBaseInstrInfo.h Fri Dec 11 19:28:10 2009
@@ -176,6 +176,9 @@
// if there is not such an opcode.
virtual unsigned getUnindexedOpcode(unsigned Opc) const =0;
+ // Return true if the block does not fall through.
+ virtual bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const =0;
+
virtual MachineInstr *convertToThreeAddress(MachineFunction::iterator &MFI,
MachineBasicBlock::iterator &MBBI,
LiveVariables *LV) const;
Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.cpp?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.cpp Fri Dec 11 19:28:10 2009
@@ -60,6 +60,25 @@
return 0;
}
+bool ARMInstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
+ if (MBB.empty()) return false;
+
+ switch (MBB.back().getOpcode()) {
+ case ARM::BX_RET: // Return.
+ case ARM::LDM_RET:
+ case ARM::B:
+ case ARM::BRIND:
+ case ARM::BR_JTr: // Jumptable branch.
+ case ARM::BR_JTm: // Jumptable branch through mem.
+ case ARM::BR_JTadd: // Jumptable branch add to pc.
+ return true;
+ default:
+ break;
+ }
+
+ return false;
+}
+
void ARMInstrInfo::
reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
unsigned DestReg, unsigned SubIdx, const MachineInstr *Orig,
Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.h?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.h Fri Dec 11 19:28:10 2009
@@ -32,6 +32,9 @@
// if there is not such an opcode.
unsigned getUnindexedOpcode(unsigned Opc) const;
+ // Return true if the block does not fall through.
+ bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
+
void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
unsigned DestReg, unsigned SubIdx,
const MachineInstr *Orig,
Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb1InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb1InstrInfo.cpp?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb1InstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb1InstrInfo.cpp Fri Dec 11 19:28:10 2009
@@ -32,6 +32,25 @@
return 0;
}
+bool
+Thumb1InstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
+ if (MBB.empty()) return false;
+
+ switch (MBB.back().getOpcode()) {
+ case ARM::tBX_RET:
+ case ARM::tBX_RET_vararg:
+ case ARM::tPOP_RET:
+ case ARM::tB:
+ case ARM::tBRIND:
+ case ARM::tBR_JTr:
+ return true;
+ default:
+ break;
+ }
+
+ return false;
+}
+
bool Thumb1InstrInfo::copyRegToReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
unsigned DestReg, unsigned SrcReg,
Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb1InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb1InstrInfo.h?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb1InstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb1InstrInfo.h Fri Dec 11 19:28:10 2009
@@ -31,6 +31,9 @@
// if there is not such an opcode.
unsigned getUnindexedOpcode(unsigned Opc) const;
+ // Return true if the block does not fall through.
+ bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
+
/// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
/// such, whenever a client has an instance of instruction info, it should
/// always be able to get register info as well (through this method).
Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.cpp?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.cpp Fri Dec 11 19:28:10 2009
@@ -36,6 +36,30 @@
}
bool
+Thumb2InstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
+ if (MBB.empty()) return false;
+
+ switch (MBB.back().getOpcode()) {
+ case ARM::t2LDM_RET:
+ case ARM::t2B: // Uncond branch.
+ case ARM::t2BR_JT: // Jumptable branch.
+ case ARM::t2TBB: // Table branch byte.
+ case ARM::t2TBH: // Table branch halfword.
+ case ARM::tBR_JTr: // Jumptable branch (16-bit version).
+ case ARM::tBX_RET:
+ case ARM::tBX_RET_vararg:
+ case ARM::tPOP_RET:
+ case ARM::tB:
+ case ARM::tBRIND:
+ return true;
+ default:
+ break;
+ }
+
+ return false;
+}
+
+bool
Thumb2InstrInfo::copyRegToReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
unsigned DestReg, unsigned SrcReg,
Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.h?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.h Fri Dec 11 19:28:10 2009
@@ -31,6 +31,9 @@
// if there is not such an opcode.
unsigned getUnindexedOpcode(unsigned Opc) const;
+ // Return true if the block does not fall through.
+ bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
+
bool copyRegToReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
unsigned DestReg, unsigned SrcReg,
Modified: llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaInstrInfo.cpp?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaInstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaInstrInfo.cpp Fri Dec 11 19:28:10 2009
@@ -392,6 +392,18 @@
.addReg(Alpha::R31);
}
+bool AlphaInstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
+ if (MBB.empty()) return false;
+
+ switch (MBB.back().getOpcode()) {
+ case Alpha::RETDAG: // Return.
+ case Alpha::RETDAGp:
+ case Alpha::BR: // Uncond branch.
+ case Alpha::JMP: // Indirect branch.
+ return true;
+ default: return false;
+ }
+}
bool AlphaInstrInfo::
ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
assert(Cond.size() == 2 && "Invalid Alpha branch opcode!");
Modified: llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaInstrInfo.h?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaInstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaInstrInfo.h Fri Dec 11 19:28:10 2009
@@ -78,6 +78,7 @@
unsigned RemoveBranch(MachineBasicBlock &MBB) const;
void insertNoop(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI) const;
+ bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
/// getGlobalBaseReg - Return a virtual register initialized with the
Modified: llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.cpp?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.cpp Fri Dec 11 19:28:10 2009
@@ -580,6 +580,10 @@
}
}
+bool
+SPUInstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
+ return (!MBB.empty() && isUncondBranch(&MBB.back()));
+}
//! Reverses a branch's condition, returning false on success.
bool
SPUInstrInfo::ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond)
Modified: llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.h?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.h Fri Dec 11 19:28:10 2009
@@ -79,6 +79,9 @@
bool canFoldMemoryOperand(const MachineInstr *MI,
const SmallVectorImpl<unsigned> &Ops) const;
+ //! Return true if the specified block does not fall through
+ virtual bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
+
//! Reverses a branch's condition, returning false on success.
virtual
bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
Modified: llvm/branches/Apple/Zoidberg/lib/Target/MSP430/MSP430InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/MSP430/MSP430InstrInfo.cpp?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/MSP430/MSP430InstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/MSP430/MSP430InstrInfo.cpp Fri Dec 11 19:28:10 2009
@@ -219,6 +219,17 @@
return false;
}
+bool MSP430InstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB)const{
+ if (MBB.empty()) return false;
+
+ switch (MBB.back().getOpcode()) {
+ case MSP430::RET: // Return.
+ case MSP430::JMP: // Uncond branch.
+ return true;
+ default: return false;
+ }
+}
+
bool MSP430InstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
const TargetInstrDesc &TID = MI->getDesc();
if (!TID.isTerminator()) return false;
Modified: llvm/branches/Apple/Zoidberg/lib/Target/MSP430/MSP430InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/MSP430/MSP430InstrInfo.h?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/MSP430/MSP430InstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/MSP430/MSP430InstrInfo.h Fri Dec 11 19:28:10 2009
@@ -61,6 +61,7 @@
// Branch folding goodness
bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
+ bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
bool isUnpredicatedTerminator(const MachineInstr *MI) const;
bool AnalyzeBranch(MachineBasicBlock &MBB,
MachineBasicBlock *&TBB, MachineBasicBlock *&FBB,
Modified: llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsInstrInfo.cpp?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsInstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsInstrInfo.cpp Fri Dec 11 19:28:10 2009
@@ -568,6 +568,22 @@
return 2;
}
+/// BlockHasNoFallThrough - Analyze if MachineBasicBlock does not
+/// fall-through into its successor block.
+bool MipsInstrInfo::
+BlockHasNoFallThrough(const MachineBasicBlock &MBB) const
+{
+ if (MBB.empty()) return false;
+
+ switch (MBB.back().getOpcode()) {
+ case Mips::RET: // Return.
+ case Mips::JR: // Indirect branch.
+ case Mips::J: // Uncond branch.
+ return true;
+ default: return false;
+ }
+}
+
/// ReverseBranchCondition - Return the inverse opcode of the
/// specified Branch instruction.
bool MipsInstrInfo::
Modified: llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsInstrInfo.h?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsInstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsInstrInfo.h Fri Dec 11 19:28:10 2009
@@ -232,6 +232,7 @@
return 0;
}
+ virtual bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
virtual
bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
Modified: llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.cpp?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.cpp Fri Dec 11 19:28:10 2009
@@ -740,6 +740,18 @@
}
+bool PPCInstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
+ if (MBB.empty()) return false;
+
+ switch (MBB.back().getOpcode()) {
+ case PPC::BLR: // Return.
+ case PPC::B: // Uncond branch.
+ case PPC::BCTR: // Indirect branch.
+ return true;
+ default: return false;
+ }
+}
+
bool PPCInstrInfo::
ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
assert(Cond.size() == 2 && "Invalid PPC branch opcode!");
Modified: llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.h?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.h Fri Dec 11 19:28:10 2009
@@ -143,6 +143,7 @@
virtual bool canFoldMemoryOperand(const MachineInstr *MI,
const SmallVectorImpl<unsigned> &Ops) const;
+ virtual bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
virtual
bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
Modified: llvm/branches/Apple/Zoidberg/lib/Target/SystemZ/SystemZInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/SystemZ/SystemZInstrInfo.cpp?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/SystemZ/SystemZInstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/SystemZ/SystemZInstrInfo.cpp Fri Dec 11 19:28:10 2009
@@ -402,6 +402,18 @@
return false;
}
+bool SystemZInstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB)const{
+ if (MBB.empty()) return false;
+
+ switch (MBB.back().getOpcode()) {
+ case SystemZ::RET: // Return.
+ case SystemZ::JMP: // Uncond branch.
+ case SystemZ::JMPr: // Indirect branch.
+ return true;
+ default: return false;
+ }
+}
+
bool SystemZInstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
const TargetInstrDesc &TID = MI->getDesc();
if (!TID.isTerminator()) return false;
Modified: llvm/branches/Apple/Zoidberg/lib/Target/SystemZ/SystemZInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/SystemZ/SystemZInstrInfo.h?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/SystemZ/SystemZInstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/SystemZ/SystemZInstrInfo.h Fri Dec 11 19:28:10 2009
@@ -89,6 +89,7 @@
const std::vector<CalleeSavedInfo> &CSI) const;
bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
+ virtual bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
virtual bool isUnpredicatedTerminator(const MachineInstr *MI) const;
virtual bool AnalyzeBranch(MachineBasicBlock &MBB,
MachineBasicBlock *&TBB,
Modified: llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.cpp?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.cpp Fri Dec 11 19:28:10 2009
@@ -2755,6 +2755,27 @@
return I->second.first;
}
+bool X86InstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
+ if (MBB.empty()) return false;
+
+ switch (MBB.back().getOpcode()) {
+ case X86::TCRETURNri:
+ case X86::TCRETURNdi:
+ case X86::RET: // Return.
+ case X86::RETI:
+ case X86::TAILJMPd:
+ case X86::TAILJMPr:
+ case X86::TAILJMPm:
+ case X86::JMP: // Uncond branch.
+ case X86::JMP32r: // Indirect branch.
+ case X86::JMP64r: // Indirect branch (64-bit).
+ case X86::JMP32m: // Indirect branch through mem.
+ case X86::JMP64m: // Indirect branch through mem (64-bit).
+ return true;
+ default: return false;
+ }
+}
+
bool X86InstrInfo::
ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
assert(Cond.size() == 1 && "Invalid X86 branch condition!");
Modified: llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.h?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.h Fri Dec 11 19:28:10 2009
@@ -595,6 +595,7 @@
bool UnfoldLoad, bool UnfoldStore,
unsigned *LoadRegIndex = 0) const;
+ virtual bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
virtual
bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
Modified: llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreInstrInfo.cpp?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreInstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreInstrInfo.cpp Fri Dec 11 19:28:10 2009
@@ -453,6 +453,26 @@
return true;
}
+/// BlockHasNoFallThrough - Analyse if MachineBasicBlock does not
+/// fall-through into its successor block.
+bool XCoreInstrInfo::
+BlockHasNoFallThrough(const MachineBasicBlock &MBB) const
+{
+ if (MBB.empty()) return false;
+
+ switch (MBB.back().getOpcode()) {
+ case XCore::RETSP_u6: // Return.
+ case XCore::RETSP_lu6:
+ case XCore::BAU_1r: // Indirect branch.
+ case XCore::BRFU_u6: // Uncond branch.
+ case XCore::BRFU_lu6:
+ case XCore::BRBU_u6:
+ case XCore::BRBU_lu6:
+ return true;
+ default: return false;
+ }
+}
+
/// ReverseBranchCondition - Return the inverse opcode of the
/// specified Branch instruction.
bool XCoreInstrInfo::
Modified: llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreInstrInfo.h?rev=91199&r1=91198&r2=91199&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreInstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreInstrInfo.h Fri Dec 11 19:28:10 2009
@@ -87,6 +87,8 @@
MachineBasicBlock::iterator MI,
const std::vector<CalleeSavedInfo> &CSI) const;
+ virtual bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
+
virtual bool ReverseBranchCondition(
SmallVectorImpl<MachineOperand> &Cond) const;
};
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