[llvm-branch-commits] [llvm-branch] r91188 - in /llvm/branches/Apple/Zoidberg: include/llvm/Target/ lib/CodeGen/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/MSP430/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/SystemZ/ lib/Target/X86/ lib/Target/XCore/

Bill Wendling isanbard at gmail.com
Fri Dec 11 16:26:12 PST 2009


Author: void
Date: Fri Dec 11 18:26:12 2009
New Revision: 91188

URL: http://llvm.org/viewvc/llvm-project?rev=91188&view=rev
Log:
$ svn merge -c 90633 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r90633 into '.':
U    lib/CodeGen/MachineBasicBlock.cpp

$ svn merge -c 90634 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r90634 into '.':
U    include/llvm/Target/TargetInstrInfo.h
U    lib/CodeGen/MachineVerifier.cpp
U    lib/CodeGen/BranchFolding.cpp
U    lib/Target/PowerPC/PPCInstrInfo.h
U    lib/Target/PowerPC/PPCInstrInfo.cpp
U    lib/Target/ARM/Thumb1InstrInfo.h
U    lib/Target/ARM/ARMInstrInfo.cpp
U    lib/Target/ARM/Thumb1InstrInfo.cpp
U    lib/Target/ARM/Thumb2InstrInfo.h
U    lib/Target/ARM/ARMBaseInstrInfo.h
U    lib/Target/ARM/ARMInstrInfo.h
U    lib/Target/ARM/Thumb2InstrInfo.cpp
U    lib/Target/XCore/XCoreInstrInfo.cpp
U    lib/Target/XCore/XCoreInstrInfo.h
U    lib/Target/Alpha/AlphaInstrInfo.cpp
U    lib/Target/Alpha/AlphaInstrInfo.h
U    lib/Target/X86/X86InstrInfo.h
U    lib/Target/X86/X86InstrInfo.cpp
U    lib/Target/MSP430/MSP430InstrInfo.cpp
U    lib/Target/MSP430/MSP430InstrInfo.h
U    lib/Target/CellSPU/SPUInstrInfo.h
U    lib/Target/CellSPU/SPUInstrInfo.cpp
U    lib/Target/Mips/MipsInstrInfo.cpp
U    lib/Target/Mips/MipsInstrInfo.h
U    lib/Target/SystemZ/SystemZInstrInfo.cpp
U    lib/Target/SystemZ/SystemZInstrInfo.h


Modified:
    llvm/branches/Apple/Zoidberg/include/llvm/Target/TargetInstrInfo.h
    llvm/branches/Apple/Zoidberg/lib/CodeGen/BranchFolding.cpp
    llvm/branches/Apple/Zoidberg/lib/CodeGen/MachineBasicBlock.cpp
    llvm/branches/Apple/Zoidberg/lib/CodeGen/MachineVerifier.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMBaseInstrInfo.h
    llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.h
    llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb1InstrInfo.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb1InstrInfo.h
    llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.h
    llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaInstrInfo.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaInstrInfo.h
    llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.h
    llvm/branches/Apple/Zoidberg/lib/Target/MSP430/MSP430InstrInfo.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/MSP430/MSP430InstrInfo.h
    llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsInstrInfo.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsInstrInfo.h
    llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.h
    llvm/branches/Apple/Zoidberg/lib/Target/SystemZ/SystemZInstrInfo.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/SystemZ/SystemZInstrInfo.h
    llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.h
    llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreInstrInfo.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreInstrInfo.h

Modified: llvm/branches/Apple/Zoidberg/include/llvm/Target/TargetInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/include/llvm/Target/TargetInstrInfo.h?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/include/llvm/Target/TargetInstrInfo.h Fri Dec 11 18:26:12 2009
@@ -461,14 +461,6 @@
     return 0;
   }
   
-  /// BlockHasNoFallThrough - Return true if the specified block does not
-  /// fall-through into its successor block.  This is primarily used when a
-  /// branch is unanalyzable.  It is useful for things like unconditional
-  /// indirect branches (jump tables).
-  virtual bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
-    return false;
-  }
-  
   /// ReverseBranchCondition - Reverses the branch condition of the specified
   /// condition list, returning false on success and true if it cannot be
   /// reversed.

Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/BranchFolding.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/BranchFolding.cpp?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/BranchFolding.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/BranchFolding.cpp Fri Dec 11 18:26:12 2009
@@ -1140,7 +1140,7 @@
       // falls through into MBB and we can't understand the prior block's branch
       // condition.
       if (MBB->empty()) {
-        bool PredHasNoFallThrough = TII->BlockHasNoFallThrough(PrevBB);
+        bool PredHasNoFallThrough = !PrevBB.canFallThrough();
         if (PredHasNoFallThrough || !PriorUnAnalyzable ||
             !PrevBB.isSuccessor(MBB)) {
           // If the prior block falls through into us, turn it into an

Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/MachineBasicBlock.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/MachineBasicBlock.cpp?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/MachineBasicBlock.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/MachineBasicBlock.cpp Fri Dec 11 18:26:12 2009
@@ -364,11 +364,6 @@
 }
 
 bool MachineBasicBlock::canFallThrough() {
-  MachineBasicBlock *TBB = 0, *FBB = 0;
-  SmallVector<MachineOperand, 4> Cond;
-  const TargetInstrInfo *TII = getParent()->getTarget().getInstrInfo();
-  bool BranchUnAnalyzable = TII->AnalyzeBranch(*this, TBB, FBB, Cond, true);
-
   MachineFunction::iterator Fallthrough = this;
   ++Fallthrough;
   // If FallthroughBlock is off the end of the function, it can't fall through.
@@ -379,16 +374,21 @@
   if (!isSuccessor(Fallthrough))
     return false;
 
-  // If we couldn't analyze the branch, examine the last instruction.
-  // If the block doesn't end in a known control barrier, assume fallthrough
-  // is possible. The isPredicable check is needed because this code can be
-  // called during IfConversion, where an instruction which is normally a
-  // Barrier is predicated and thus no longer an actual control barrier. This
-  // is over-conservative though, because if an instruction isn't actually
-  // predicated we could still treat it like a barrier.
-  if (BranchUnAnalyzable)
+  // Analyze the branches, if any, at the end of the block.
+  MachineBasicBlock *TBB = 0, *FBB = 0;
+  SmallVector<MachineOperand, 4> Cond;
+  const TargetInstrInfo *TII = getParent()->getTarget().getInstrInfo();
+  if (TII->AnalyzeBranch(*this, TBB, FBB, Cond, true)) {
+    // If we couldn't analyze the branch, examine the last instruction.
+    // If the block doesn't end in a known control barrier, assume fallthrough
+    // is possible. The isPredicable check is needed because this code can be
+    // called during IfConversion, where an instruction which is normally a
+    // Barrier is predicated and thus no longer an actual control barrier. This
+    // is over-conservative though, because if an instruction isn't actually
+    // predicated we could still treat it like a barrier.
     return empty() || !back().getDesc().isBarrier() ||
            back().getDesc().isPredicable();
+  }
 
   // If there is no branch, control always falls through.
   if (TBB == 0) return true;

Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/MachineVerifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/MachineVerifier.cpp?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/MachineVerifier.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/MachineVerifier.cpp Fri Dec 11 18:26:12 2009
@@ -376,15 +376,6 @@
         report("MBB doesn't fall through but is empty!", MBB);
       }
     }
-    if (TII->BlockHasNoFallThrough(*MBB)) {
-      if (MBB->empty()) {
-        report("TargetInstrInfo says the block has no fall through, but the "
-               "block is empty!", MBB);
-      } else if (!MBB->back().getDesc().isBarrier()) {
-        report("TargetInstrInfo says the block has no fall through, but the "
-               "block does not end in a barrier!", MBB);
-      }
-    }
   } else {
     // Block is last in function.
     if (MBB->empty()) {

Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMBaseInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMBaseInstrInfo.h?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMBaseInstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMBaseInstrInfo.h Fri Dec 11 18:26:12 2009
@@ -176,9 +176,6 @@
   // if there is not such an opcode.
   virtual unsigned getUnindexedOpcode(unsigned Opc) const =0;
 
-  // Return true if the block does not fall through.
-  virtual bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const =0;
-
   virtual MachineInstr *convertToThreeAddress(MachineFunction::iterator &MFI,
                                               MachineBasicBlock::iterator &MBBI,
                                               LiveVariables *LV) const;

Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.cpp?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.cpp Fri Dec 11 18:26:12 2009
@@ -60,25 +60,6 @@
   return 0;
 }
 
-bool ARMInstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
-  if (MBB.empty()) return false;
-
-  switch (MBB.back().getOpcode()) {
-  case ARM::BX_RET:   // Return.
-  case ARM::LDM_RET:
-  case ARM::B:
-  case ARM::BRIND:
-  case ARM::BR_JTr:   // Jumptable branch.
-  case ARM::BR_JTm:   // Jumptable branch through mem.
-  case ARM::BR_JTadd: // Jumptable branch add to pc.
-    return true;
-  default:
-    break;
-  }
-
-  return false;
-}
-
 void ARMInstrInfo::
 reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
               unsigned DestReg, unsigned SubIdx, const MachineInstr *Orig,

Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.h?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMInstrInfo.h Fri Dec 11 18:26:12 2009
@@ -32,9 +32,6 @@
   // if there is not such an opcode.
   unsigned getUnindexedOpcode(unsigned Opc) const;
 
-  // Return true if the block does not fall through.
-  bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
-
   void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
                      unsigned DestReg, unsigned SubIdx,
                      const MachineInstr *Orig,

Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb1InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb1InstrInfo.cpp?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb1InstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb1InstrInfo.cpp Fri Dec 11 18:26:12 2009
@@ -32,25 +32,6 @@
   return 0;
 }
 
-bool
-Thumb1InstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
-  if (MBB.empty()) return false;
-
-  switch (MBB.back().getOpcode()) {
-  case ARM::tBX_RET:
-  case ARM::tBX_RET_vararg:
-  case ARM::tPOP_RET:
-  case ARM::tB:
-  case ARM::tBRIND:
-  case ARM::tBR_JTr:
-    return true;
-  default:
-    break;
-  }
-
-  return false;
-}
-
 bool Thumb1InstrInfo::copyRegToReg(MachineBasicBlock &MBB,
                                    MachineBasicBlock::iterator I,
                                    unsigned DestReg, unsigned SrcReg,

Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb1InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb1InstrInfo.h?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb1InstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb1InstrInfo.h Fri Dec 11 18:26:12 2009
@@ -31,9 +31,6 @@
   // if there is not such an opcode.
   unsigned getUnindexedOpcode(unsigned Opc) const;
 
-  // Return true if the block does not fall through.
-  bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
-
   /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info.  As
   /// such, whenever a client has an instance of instruction info, it should
   /// always be able to get register info as well (through this method).

Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.cpp?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.cpp Fri Dec 11 18:26:12 2009
@@ -36,30 +36,6 @@
 }
 
 bool
-Thumb2InstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
-  if (MBB.empty()) return false;
-
-  switch (MBB.back().getOpcode()) {
-  case ARM::t2LDM_RET:
-  case ARM::t2B:        // Uncond branch.
-  case ARM::t2BR_JT:    // Jumptable branch.
-  case ARM::t2TBB:      // Table branch byte.
-  case ARM::t2TBH:      // Table branch halfword.
-  case ARM::tBR_JTr:    // Jumptable branch (16-bit version).
-  case ARM::tBX_RET:
-  case ARM::tBX_RET_vararg:
-  case ARM::tPOP_RET:
-  case ARM::tB:
-  case ARM::tBRIND:
-    return true;
-  default:
-    break;
-  }
-
-  return false;
-}
-
-bool
 Thumb2InstrInfo::copyRegToReg(MachineBasicBlock &MBB,
                               MachineBasicBlock::iterator I,
                               unsigned DestReg, unsigned SrcReg,

Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.h?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.h Fri Dec 11 18:26:12 2009
@@ -31,9 +31,6 @@
   // if there is not such an opcode.
   unsigned getUnindexedOpcode(unsigned Opc) const;
 
-  // Return true if the block does not fall through.
-  bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
-
   bool copyRegToReg(MachineBasicBlock &MBB,
                     MachineBasicBlock::iterator I,
                     unsigned DestReg, unsigned SrcReg,

Modified: llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaInstrInfo.cpp?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaInstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaInstrInfo.cpp Fri Dec 11 18:26:12 2009
@@ -392,18 +392,6 @@
     .addReg(Alpha::R31);
 }
 
-bool AlphaInstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
-  if (MBB.empty()) return false;
-  
-  switch (MBB.back().getOpcode()) {
-  case Alpha::RETDAG: // Return.
-  case Alpha::RETDAGp:
-  case Alpha::BR:     // Uncond branch.
-  case Alpha::JMP:  // Indirect branch.
-    return true;
-  default: return false;
-  }
-}
 bool AlphaInstrInfo::
 ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
   assert(Cond.size() == 2 && "Invalid Alpha branch opcode!");

Modified: llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaInstrInfo.h?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaInstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/Alpha/AlphaInstrInfo.h Fri Dec 11 18:26:12 2009
@@ -78,7 +78,6 @@
   unsigned RemoveBranch(MachineBasicBlock &MBB) const;
   void insertNoop(MachineBasicBlock &MBB, 
                   MachineBasicBlock::iterator MI) const;
-  bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
   bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
 
   /// getGlobalBaseReg - Return a virtual register initialized with the

Modified: llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.cpp?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.cpp Fri Dec 11 18:26:12 2009
@@ -580,10 +580,6 @@
   }
 }
 
-bool
-SPUInstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
-  return (!MBB.empty() && isUncondBranch(&MBB.back()));
-}
 //! Reverses a branch's condition, returning false on success.
 bool
 SPUInstrInfo::ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond)

Modified: llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.h?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/CellSPU/SPUInstrInfo.h Fri Dec 11 18:26:12 2009
@@ -79,9 +79,6 @@
     bool canFoldMemoryOperand(const MachineInstr *MI,
                               const SmallVectorImpl<unsigned> &Ops) const;
 
-    //! Return true if the specified block does not fall through
-    virtual bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
-
     //! Reverses a branch's condition, returning false on success.
     virtual
     bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;

Modified: llvm/branches/Apple/Zoidberg/lib/Target/MSP430/MSP430InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/MSP430/MSP430InstrInfo.cpp?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/MSP430/MSP430InstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/MSP430/MSP430InstrInfo.cpp Fri Dec 11 18:26:12 2009
@@ -219,17 +219,6 @@
   return false;
 }
 
-bool MSP430InstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB)const{
-  if (MBB.empty()) return false;
-
-  switch (MBB.back().getOpcode()) {
-  case MSP430::RET:   // Return.
-  case MSP430::JMP:   // Uncond branch.
-    return true;
-  default: return false;
-  }
-}
-
 bool MSP430InstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
   const TargetInstrDesc &TID = MI->getDesc();
   if (!TID.isTerminator()) return false;

Modified: llvm/branches/Apple/Zoidberg/lib/Target/MSP430/MSP430InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/MSP430/MSP430InstrInfo.h?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/MSP430/MSP430InstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/MSP430/MSP430InstrInfo.h Fri Dec 11 18:26:12 2009
@@ -61,7 +61,6 @@
 
   // Branch folding goodness
   bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
-  bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
   bool isUnpredicatedTerminator(const MachineInstr *MI) const;
   bool AnalyzeBranch(MachineBasicBlock &MBB,
                      MachineBasicBlock *&TBB, MachineBasicBlock *&FBB,

Modified: llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsInstrInfo.cpp?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsInstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsInstrInfo.cpp Fri Dec 11 18:26:12 2009
@@ -568,22 +568,6 @@
   return 2;
 }
 
-/// BlockHasNoFallThrough - Analyze if MachineBasicBlock does not
-/// fall-through into its successor block.
-bool MipsInstrInfo::
-BlockHasNoFallThrough(const MachineBasicBlock &MBB) const 
-{
-  if (MBB.empty()) return false;
-  
-  switch (MBB.back().getOpcode()) {
-  case Mips::RET:     // Return.
-  case Mips::JR:      // Indirect branch.
-  case Mips::J:       // Uncond branch.
-    return true;
-  default: return false;
-  }
-}
-
 /// ReverseBranchCondition - Return the inverse opcode of the 
 /// specified Branch instruction.
 bool MipsInstrInfo::

Modified: llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsInstrInfo.h?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsInstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/Mips/MipsInstrInfo.h Fri Dec 11 18:26:12 2009
@@ -232,7 +232,6 @@
     return 0;
   }
   
-  virtual bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
   virtual
   bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
 

Modified: llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.cpp?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.cpp Fri Dec 11 18:26:12 2009
@@ -740,18 +740,6 @@
 }
 
 
-bool PPCInstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
-  if (MBB.empty()) return false;
-  
-  switch (MBB.back().getOpcode()) {
-  case PPC::BLR:   // Return.
-  case PPC::B:     // Uncond branch.
-  case PPC::BCTR:  // Indirect branch.
-    return true;
-  default: return false;
-  }
-}
-
 bool PPCInstrInfo::
 ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
   assert(Cond.size() == 2 && "Invalid PPC branch opcode!");

Modified: llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.h?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/PowerPC/PPCInstrInfo.h Fri Dec 11 18:26:12 2009
@@ -143,7 +143,6 @@
   virtual bool canFoldMemoryOperand(const MachineInstr *MI,
                                     const SmallVectorImpl<unsigned> &Ops) const;
   
-  virtual bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
   virtual
   bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
   

Modified: llvm/branches/Apple/Zoidberg/lib/Target/SystemZ/SystemZInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/SystemZ/SystemZInstrInfo.cpp?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/SystemZ/SystemZInstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/SystemZ/SystemZInstrInfo.cpp Fri Dec 11 18:26:12 2009
@@ -402,18 +402,6 @@
   return false;
 }
 
-bool SystemZInstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB)const{
-  if (MBB.empty()) return false;
-
-  switch (MBB.back().getOpcode()) {
-  case SystemZ::RET:   // Return.
-  case SystemZ::JMP:   // Uncond branch.
-  case SystemZ::JMPr:  // Indirect branch.
-    return true;
-  default: return false;
-  }
-}
-
 bool SystemZInstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
   const TargetInstrDesc &TID = MI->getDesc();
   if (!TID.isTerminator()) return false;

Modified: llvm/branches/Apple/Zoidberg/lib/Target/SystemZ/SystemZInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/SystemZ/SystemZInstrInfo.h?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/SystemZ/SystemZInstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/SystemZ/SystemZInstrInfo.h Fri Dec 11 18:26:12 2009
@@ -89,7 +89,6 @@
                                  const std::vector<CalleeSavedInfo> &CSI) const;
 
   bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
-  virtual bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
   virtual bool isUnpredicatedTerminator(const MachineInstr *MI) const;
   virtual bool AnalyzeBranch(MachineBasicBlock &MBB,
                              MachineBasicBlock *&TBB,

Modified: llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.cpp?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.cpp Fri Dec 11 18:26:12 2009
@@ -2755,27 +2755,6 @@
   return I->second.first;
 }
 
-bool X86InstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
-  if (MBB.empty()) return false;
-  
-  switch (MBB.back().getOpcode()) {
-  case X86::TCRETURNri:
-  case X86::TCRETURNdi:
-  case X86::RET:     // Return.
-  case X86::RETI:
-  case X86::TAILJMPd:
-  case X86::TAILJMPr:
-  case X86::TAILJMPm:
-  case X86::JMP:     // Uncond branch.
-  case X86::JMP32r:  // Indirect branch.
-  case X86::JMP64r:  // Indirect branch (64-bit).
-  case X86::JMP32m:  // Indirect branch through mem.
-  case X86::JMP64m:  // Indirect branch through mem (64-bit).
-    return true;
-  default: return false;
-  }
-}
-
 bool X86InstrInfo::
 ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
   assert(Cond.size() == 1 && "Invalid X86 branch condition!");

Modified: llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.h?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/X86/X86InstrInfo.h Fri Dec 11 18:26:12 2009
@@ -595,7 +595,6 @@
                                       bool UnfoldLoad, bool UnfoldStore,
                                       unsigned *LoadRegIndex = 0) const;
   
-  virtual bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
   virtual
   bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
 

Modified: llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreInstrInfo.cpp?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreInstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreInstrInfo.cpp Fri Dec 11 18:26:12 2009
@@ -453,26 +453,6 @@
   return true;
 }
 
-/// BlockHasNoFallThrough - Analyse if MachineBasicBlock does not
-/// fall-through into its successor block.
-bool XCoreInstrInfo::
-BlockHasNoFallThrough(const MachineBasicBlock &MBB) const 
-{
-  if (MBB.empty()) return false;
-  
-  switch (MBB.back().getOpcode()) {
-  case XCore::RETSP_u6:     // Return.
-  case XCore::RETSP_lu6:
-  case XCore::BAU_1r:       // Indirect branch.
-  case XCore::BRFU_u6:      // Uncond branch.
-  case XCore::BRFU_lu6:
-  case XCore::BRBU_u6:
-  case XCore::BRBU_lu6:
-    return true;
-  default: return false;
-  }
-}
-
 /// ReverseBranchCondition - Return the inverse opcode of the 
 /// specified Branch instruction.
 bool XCoreInstrInfo::

Modified: llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreInstrInfo.h?rev=91188&r1=91187&r2=91188&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreInstrInfo.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/XCore/XCoreInstrInfo.h Fri Dec 11 18:26:12 2009
@@ -87,8 +87,6 @@
                                          MachineBasicBlock::iterator MI,
                                const std::vector<CalleeSavedInfo> &CSI) const;
 
-  virtual bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
-
   virtual bool ReverseBranchCondition(
                             SmallVectorImpl<MachineOperand> &Cond) const;
 };





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