[llvm-branch-commits] [llvm-branch] r79294 - in /llvm/branches/Apple/Bender-SWB: lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp lib/Target/PowerPC/PPCISelDAGToDAG.cpp test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll
Bill Wendling
isanbard at gmail.com
Mon Aug 17 17:23:19 PDT 2009
Author: void
Date: Mon Aug 17 19:23:19 2009
New Revision: 79294
URL: http://llvm.org/viewvc/llvm-project?rev=79294&view=rev
Log:
$ svn merge -c 79292 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r79292 into '.':
A test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll
U lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
U lib/Target/PowerPC/PPCISelDAGToDAG.cpp
Added:
llvm/branches/Apple/Bender-SWB/test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll
- copied unchanged from r79292, llvm/trunk/test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll
Modified:
llvm/branches/Apple/Bender-SWB/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
llvm/branches/Apple/Bender-SWB/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
Modified: llvm/branches/Apple/Bender-SWB/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Bender-SWB/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp?rev=79294&r1=79293&r2=79294&view=diff
==============================================================================
--- llvm/branches/Apple/Bender-SWB/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp (original)
+++ llvm/branches/Apple/Bender-SWB/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp Mon Aug 17 19:23:19 2009
@@ -475,15 +475,17 @@
return false;
}
+// At the moment, all inline asm memory operands are a single register.
+// In any case, the output of this routine should always be just one
+// assembler operand.
+
bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
unsigned AsmVariant,
const char *ExtraCode) {
if (ExtraCode && ExtraCode[0])
return true; // Unknown modifier.
- if (MI->getOperand(OpNo).isReg())
- printMemRegReg(MI, OpNo);
- else
- printMemRegImm(MI, OpNo);
+ assert (MI->getOperand(OpNo).isReg());
+ printOperand(MI, OpNo);
return false;
}
Modified: llvm/branches/Apple/Bender-SWB/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Bender-SWB/lib/Target/PowerPC/PPCISelDAGToDAG.cpp?rev=79294&r1=79293&r2=79294&view=diff
==============================================================================
--- llvm/branches/Apple/Bender-SWB/lib/Target/PowerPC/PPCISelDAGToDAG.cpp (original)
+++ llvm/branches/Apple/Bender-SWB/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Mon Aug 17 19:23:19 2009
@@ -145,30 +145,14 @@
}
/// SelectInlineAsmMemoryOperand - Implement addressing mode selection for
- /// inline asm expressions.
- virtual bool SelectInlineAsmMemoryOperand(const SDValue &Op,
+ /// inline asm expressions. It is always correct to compute the value into
+ /// a register. The case of adding a (possibly relocatable) constant to a
+ /// register can be improved, but it is wrong to substitute Reg+Reg for
+ /// Reg in an asm, because the load or store opcode would have to change.
+ virtual bool SelectInlineAsmMemoryOperand(const SDValue &Op,
char ConstraintCode,
std::vector<SDValue> &OutOps) {
- SDValue Op0, Op1;
- switch (ConstraintCode) {
- default: return true;
- case 'm': // memory
- if (!SelectAddrIdx(Op, Op, Op0, Op1))
- SelectAddrImm(Op, Op, Op0, Op1);
- break;
- case 'o': // offsetable
- if (!SelectAddrImm(Op, Op, Op0, Op1)) {
- Op0 = Op;
- Op1 = getSmallIPtrImm(0);
- }
- break;
- case 'v': // not offsetable
- SelectAddrIdxOnly(Op, Op, Op0, Op1);
- break;
- }
-
- OutOps.push_back(Op0);
- OutOps.push_back(Op1);
+ OutOps.push_back(Op);
return false;
}
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