[Lldb-commits] [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)

[Jonathan Thackray via lldb-commits]

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@@ -11384,11 +11384,14 @@ let Predicates = [HasRCPC3, HasNEON] in {
 //===----------------------------------------------------------------------===//
 // 128-bit System Instructions (FEAT_SYSINSTR128)
 //===----------------------------------------------------------------------===//
-def SYSPxt  : SystemPXtI<0, "sysp">;
+def SYSPxt  : SystemPXtI<0, "sysp"> {
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jthackray wrote:

Ok, I've completely removed `SYSPxt_XZR` (with the long comment; I think the code must have changed since it was originally written, as it's now possible to write without this custom decoder).

This means I could get rid of `addSyspXzrPairOperand()` and `DecodeSyspXzrInstruction()` too, so the code is now a lot simpler. I've slightly improved the error messages:
 * "expected second odd register of a consecutive same-size even/odd register pair" -> "second register must be the next consecutive register after the first register"
 * expected first even register of a consecutive same-size even/odd register pair" -> first register must be even-numbered or xzr"
to be more in plain English, and added more edge cases for testing.

https://github.com/llvm/llvm-project/pull/182410