[Lldb-commits] [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)
via lldb-commits
lldb-commits at lists.llvm.org
Tue Mar 10 09:08:58 PDT 2026
github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code. :warning:
<details>
<summary>
You can test this locally with the following command:
</summary>
``````````bash
git-clang-format --diff origin/main HEAD --extensions h,cpp -- llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h --diff_from_common_commit
``````````
:warning:
The reproduction instructions above might return results for more than one PR
in a stack if you are using a stacked PR workflow. You can limit the results by
changing `origin/main` to the base branch/commit you want to compare against.
:warning:
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index 88d4ccb31..d2962cc72 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -1449,9 +1449,7 @@ public:
Reg.Reg);
}
- bool isSyspPair() const {
- return isGPR64<AArch64::GPR64RegClassID>();
- }
+ bool isSyspPair() const { return isGPR64<AArch64::GPR64RegClassID>(); }
template<int64_t Angle, int64_t Remainder>
DiagnosticPredicate isComplexRotation() const {
@@ -3328,7 +3326,7 @@ ParseStatus AArch64AsmParser::tryParseSyspPair(OperandVector &Operands) {
if (FirstReg == AArch64::XZR) {
if (SecondReg != AArch64::XZR)
return TokError("xzr must be followed by xzr");
- // The SYSP alias is UNDEFINED if Rt<0> == '1' && Rt != '11111'.
+ // The SYSP alias is UNDEFINED if Rt<0> == '1' && Rt != '11111'.
} else if (RI->getEncodingValue(FirstReg) & 1) {
return TokError("first register must be even-numbered or xzr");
} else if (!XRegClass.contains(SecondReg) ||
``````````
</details>
https://github.com/llvm/llvm-project/pull/182410
More information about the lldb-commits
mailing list