[Lldb-commits] [lldb] [lldb][elf-core][ARM] Add support for VFP registers (PR #155956)

[Igor Kudrin via lldb-commits]

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@@ -688,6 +688,27 @@ def test_arm_core(self):
         values["lr"] = "0x0000000e"
         values["pc"] = "0x0000000f"
         values["cpsr"] = "0x00000010"
+        for i in range(32):
+            values["s" + str(i)] = str(i)
+        values["fpscr"] = "0x12345678"
+        values["d0"] = "0.0078125"
+        values["d1"] = "32.000007629394531"
+        values["d2"] = "2048.0004920959473"
+        values["d3"] = "32768.007904052734"
+        values["d4"] = "262144.0634765625"
+        values["d5"] = "1048576.2543945313"
+        values["d6"] = "4194305.01953125"
+        values["d7"] = "16777220.0859375"
+        values["d8"] = "50331656.1875"
+        values["d9"] = "100663312.390625"
+        values["d10"] = "201326624.8125"
+        values["d11"] = "402653249.6875"
+        values["d12"] = "805306499.5"
+        values["d13"] = "1610612999.25"
+        values["d14"] = "3221225999"
+        values["d15"] = "6442451999"
+        for i in range(16, 32):
+            values["d" + str(i)] = str(i)
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igorkudrin wrote:

> How were these generated, using one of the existing programs in `lldb/test/API/functionalities/postmortem/elf-core/`?

Unfortunately, not. I started with `main_fpr.c`, but, since the float variables are only defined there but not used, the VFP registers remained empty. So, I took another program to have some registers filled and checked that the updated lldb shows the correct register values for the core dump file.

Then, `linux-arm.core` is obviously created artificially, and is not dumped from any real program. Thus, I followed the example and just manually added another note record using a hex editor. I started from a note record from a real core dump file, but updated the values so that each register was filled.

> Why do we have specific values for d0-15 but not for 16 to 31? I think it's something to do with how the registers overlap in hardware but I've forgotten the details.

You are right, each of d0-15 registers overlaps two of s0-31 registers.

https://github.com/llvm/llvm-project/pull/155956