[Lldb-commits] [lldb] [lldb][RISCV] fix LR/SC atomic sequence handling in lldb-server (PR #127505)
Alex Bradbury via lldb-commits
lldb-commits at lists.llvm.org
Mon Mar 31 10:15:42 PDT 2025
asb wrote:
My apologies for missing this before. It is indeed completely valid to have a compressed branch immediately after the lr.w or sc.w and remain compliant with the forward progress guarantee. I feel I'm lacking a bit of higher level understanding of what this code is trying to do it, because:
* It matches only one of many possible lr.[wd]/sc.[wd] sequences. For instance we'll have sequences of other integer instructions between the lr and sc for e.g. narrower than 32-bit cmpxchg (see llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll)
* Why isn't there a a call to m_emu.WriteMem in the implementation?
https://github.com/llvm/llvm-project/pull/127505
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