[Lldb-commits] [lldb] [lldb] Support overriding the disassembly CPU & features (PR #115382)

[Jason Molenda via lldb-commits]

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@@ -157,6 +157,12 @@ let Definition = "target" in {
     DefaultEnumValue<"eX86DisFlavorDefault">,
     EnumValues<"OptionEnumValues(g_x86_dis_flavor_value_types)">,
     Desc<"The default disassembly flavor to use for x86 or x86-64 targets.">;
+  def DisassemblyCPU: Property<"disassembly-cpu", "String">,
+    DefaultStringValue<"">,
+    Desc<"Override the CPU for disassembling. Takes the same values as the -mcpu compiler flag.">;
+  def DisassemblyFeatures: Property<"disassembly-features", "String">,
+    DefaultStringValue<"">,
+    Desc<"Specify additional CPU features for disassembling.">;
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jasonmolenda wrote:

Oh, that's helpful, yes I was talking to Jonas about how you have to read the RISCVFeatures.td table in the llvm sources to get the names that llvm uses for the ISA extensions there, but we didn't want to document that.  I didn't realize there was a commandline way of dumping them.

https://github.com/llvm/llvm-project/pull/115382