[Lldb-commits] [lldb] [lldb][RISCV] Add RegisterContextPOSIXCore for RISC-V 64 (PR #93297)

[David Spickett via lldb-commits]

DavidSpickett wrote:

Thanks, these look good.

This does not include the FP registers, but I'm ok with you adding proper testing (with inline asm to set the registers) later, in the register class refactoring you mentioned.

For now, if the core has them, please add checks for the FPU registers (even if they're all 0, it's something at least). If it doesn't contain FPU regs then no worries, the PR is fine as is.

https://github.com/llvm/llvm-project/pull/93297