[Lldb-commits] [PATCH] D159101: [RISC-V] Add RISC-V ABI plugin
Ted Woodward via Phabricator via lldb-commits
lldb-commits at lists.llvm.org
Tue Aug 29 12:57:01 PDT 2023
ted added a comment.
In D159101#4625539 <https://reviews.llvm.org/D159101#4625539>, @DavidSpickett wrote:
> Also could you provide a list of things you have tested with qemu. So I can get an idea of how sure we can be any of this works / be a test plan, albeit manual for anyone updating this code in future.
I'll answer this first, because it's the easiest!
I've done the following:
- Run 32 and 64 bit Linux binaries, launched on user space riscv32 and riscv64 QEMU, using the QemuUser platform.
- Hit a breakpoint
- Continue
- Step in, step over, step out, instruction step in, instruction step out, including stepping all the way down and back up a 10 level recursive call
- Looked at a backtrace
- Looked at variables with frame variable
- Looked at and modified variables with the expression parser
- Read and writte memory
@jasonmolenda the step plan issue we discussed was actually a disassembler issue, and was fixed by D156086 <https://reviews.llvm.org/D156086>.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D159101/new/
https://reviews.llvm.org/D159101
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