[Lldb-commits] [PATCH] D156919: [lldb/crashlog] Make register output match lldb ordering in legacy mode

[Alex Langford via Phabricator via lldb-commits]

bulbazord added a comment.

In general looks good to me. I have one suggestion and one question.



================
Comment at: lldb/examples/python/crashlog.py:104
+            registers_info = None
+            if self.arch:
+                if "x86_64" == self.arch:
----------------
Is there a reason to do anything if `self.arch` isn't set? (Or is set to `None`)


================
Comment at: lldb/examples/python/crashlog.py:119-124
+                    else:
+                        # Skip register
+                        continue
+
+                    reg = self.registers[reg_name]
+                    print("%s    %-8s = %#16.16x" % (prefix, reg_name, reg))
----------------
nit: You can avoid an else+continue if you check reg_name at the end. Just a style thing though, feel free to ignore.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D156919/new/

https://reviews.llvm.org/D156919