[Lldb-commits] [lldb] aad27a8 - [lldb] Check for arm64 in TestDisassembleRawData
Dave Lee via lldb-commits
lldb-commits at lists.llvm.org
Sun Jan 9 21:37:08 PST 2022
Author: Dave Lee
Date: 2022-01-09T21:36:55-08:00
New Revision: aad27a890754fe13bd57a99a838307fee81496ee
URL: https://github.com/llvm/llvm-project/commit/aad27a890754fe13bd57a99a838307fee81496ee
DIFF: https://github.com/llvm/llvm-project/commit/aad27a890754fe13bd57a99a838307fee81496ee.diff
LOG: [lldb] Check for arm64 in TestDisassembleRawData
This test checks for `aarch64` but the lit config could also contain `arm64`.
This change adds `arm64` to make the test pass in all cases.
Differential Revision: https://reviews.llvm.org/D116912
Added:
Modified:
lldb/test/API/python_api/disassemble-raw-data/TestDisassembleRawData.py
Removed:
################################################################################
diff --git a/lldb/test/API/python_api/disassemble-raw-data/TestDisassembleRawData.py b/lldb/test/API/python_api/disassemble-raw-data/TestDisassembleRawData.py
index 3dbb090ffe5c3..7175cf32c0b0b 100644
--- a/lldb/test/API/python_api/disassemble-raw-data/TestDisassembleRawData.py
+++ b/lldb/test/API/python_api/disassemble-raw-data/TestDisassembleRawData.py
@@ -31,7 +31,7 @@ def test_disassemble_raw_data(self):
elif re.match("powerpc64le", arch):
target = self.dbg.CreateTargetWithFileAndTargetTriple("", "powerpc64le")
raw_bytes = bytearray([0x00, 0x00, 0x80, 0x38])
- elif arch == "aarch64":
+ elif arch in ("aarch64", "arm64"):
target = self.dbg.CreateTargetWithFileAndTargetTriple("", "aarch64")
raw_bytes = bytearray([0x60, 0x0c, 0x80, 0x52])
elif arch == "arm":
@@ -57,7 +57,7 @@ def test_disassemble_raw_data(self):
elif re.match("powerpc64le", arch):
self.assertEqual(inst.GetMnemonic(target), "li")
self.assertEqual(inst.GetOperands(target), "4, 0")
- elif arch == "aarch64":
+ elif arch in ("aarch64", "arm64"):
self.assertEqual(inst.GetMnemonic(target), "mov")
self.assertEqual(inst.GetOperands(target), "w0, #0x63")
elif arch == "arm":
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