[Lldb-commits] [PATCH] D62732: [RISCV] Add SystemV ABI

kasper via Phabricator via lldb-commits lldb-commits at lists.llvm.org
Sun Nov 28 23:30:35 PST 2021


kasper81 added a comment.

Hi Luis, are you planning on adding plugin architecture support (in `lldb/source/Plugins/Architecture`) as part of this work?



================
Comment at: lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp:1152
+      triple.getArch() == llvm::Triple::riscv64)
+    features_str += "+a,+c,+d,+f,+m";
+
----------------
jrtc27 wrote:
> This will override whatever the ELF says in its attributes section. This might make sense as a default for if you don't have a binary and are just poking at memory, but it makes things worse when you do, the common case that need to work as best as we can manage.
```
if (arch.GetFlags() & ArchSpec::eRISCV_arch_c) {
  features_str += "+c,";
}
```
and so on (like the case with MIPS below). Maybe we can define a and m as well in ArchSpec?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D62732/new/

https://reviews.llvm.org/D62732



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