[Lldb-commits] [PATCH] D24603: [LLDB][MIPS] fix Floating point register read/write for big endian
Nitesh Jain via lldb-commits
lldb-commits at lists.llvm.org
Thu Sep 15 07:43:05 PDT 2016
nitesh.jain added inline comments.
Comment at: source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp:1183
@@ +1182,3 @@
+ case dwarf_config5_mips64:
+ return reg_info->byte_offset;
+ case dwarf_cause_mips:
> Why do we need to do this remapping? Couldn't we structure the register infos in a way that reg_info->byte_offset is exactly the offset that ptrace expects?
> Or are you saying that ptrace does not accept register offsets, but some random register numbers instead? (I cannot tell, as the comment above is confusing.)
In case of MIPS, ptrace request PTRACE_PEEKUSER/PTRACE_POKEUSER accept register number as an offset. We used reg_info->byte_offset to find register value in the struct GPR_linux_mips. The struct GPR_linux_mips is same for 32 and 64 bit since ptrace always return 64 bit value irrespective of Arch (32 and 64) . Hence we can't modify reg_info->byte_offset to match exactly the offset that ptrace expects.
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