[Lldb-commits] [PATCH] D14633: [LLDB][MIPS] Clear bug 25194 - LLDB-Server Assertion raised when single stepping on MIPS

[Greg Clayton via lldb-commits]

clayborg added a comment.

GDB remote protocol specifies that register values are sent in target byte order. We shouldn't change this. A big endian system should not send things as little endian. That being said, the current register context assumes you have a buffer that can contain all registers and that buffer is encoded using the byte order that is specified in the DataExtractor.

It is also quite silly that the MIPS register context is reading all registers from the ptrace wrapper just to get one single register. RegisterContextDarwin reads all GPRs in a single call and marks all of them valid at once and then extracting a register goes something like:

if (RegisterIsGPR(value.info))
{

  ReadGPRsIfWeAlreadyHavent();
  // Extract register from buffer.

}
else if (RegiserIsFPU(value.info))
{

  ReadFPUsIfWeAlreadyHavent();
  // Extract register from buffer.

}

etc..


Repository:
  rL LLVM

http://reviews.llvm.org/D14633