[Lldb-commits] [PATCH] D10954: [LLDB][MIPS] Added test case support for MIPS

[Nitesh Jain]

nitesh.jain marked an inline comment as done.

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Comment at: test/python_api/value/change_values/TestChangeValueAPI.py:145
@@ +144,3 @@
+
+        #To get invalid  address in case of MIPS Architecture when sp value is changed. 
+        if arch == "mips" or arch == "mips64" or arch == "mips32el" or arch == "mips64el":
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emaste wrote:
> Can you expand on this comment?
When sp=1 , for MIPS64 it generate 64 bit invalid address causing process to exit. The solution for above problem was to set sp value greater than stack allocated size in Assembly Prologue. But it will vary from process to process hence not suitable approached. The good approach was to handle SIGBUS signal with si_code=SI_KERENEL for invalid 64 bit address.

The Patch [ http://reviews.llvm.org/D11176 | To handle SI_KERENEL generated for invalid 64 bit address ] handle above mentioned case


Repository:
  rL LLVM

http://reviews.llvm.org/D10954