[Lldb-commits] [lldb] r124631 - in /lldb/trunk: include/lldb/Core/ lldb.xcodeproj/ lldb.xcodeproj/xcshareddata/xcschemes/ source/Core/ source/Plugins/Instruction/ source/Plugins/Instruction/ARM/ source/Plugins/Process/Utility/
Greg Clayton
gclayton at apple.com
Mon Jan 31 16:04:44 PST 2011
Author: gclayton
Date: Mon Jan 31 18:04:43 2011
New Revision: 124631
URL: http://llvm.org/viewvc/llvm-project?rev=124631&view=rev
Log:
Made the EmulateInstruction class into a plug-in interface and moved the
source files around into the places they need to go.
Added:
lldb/trunk/include/lldb/Core/EmulateInstruction.h
- copied unchanged from r124630, lldb/trunk/source/Plugins/Process/Utility/EmulateInstruction.h
lldb/trunk/source/Core/EmulateInstruction.cpp
- copied unchanged from r124630, lldb/trunk/source/Plugins/Process/Utility/EmulateInstruction.cpp
lldb/trunk/source/Plugins/Instruction/
lldb/trunk/source/Plugins/Instruction/ARM/
lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
- copied, changed from r124630, lldb/trunk/source/Plugins/Process/Utility/EmulateInstructionARM.cpp
lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.h
- copied, changed from r124630, lldb/trunk/source/Plugins/Process/Utility/EmulateInstructionARM.h
Removed:
lldb/trunk/source/Plugins/Process/Utility/EmulateInstruction.cpp
lldb/trunk/source/Plugins/Process/Utility/EmulateInstruction.h
lldb/trunk/source/Plugins/Process/Utility/EmulateInstructionARM.cpp
lldb/trunk/source/Plugins/Process/Utility/EmulateInstructionARM.h
Modified:
lldb/trunk/lldb.xcodeproj/project.pbxproj
lldb/trunk/lldb.xcodeproj/xcshareddata/xcschemes/lldb-tool.xcscheme
Modified: lldb/trunk/lldb.xcodeproj/project.pbxproj
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/lldb.xcodeproj/project.pbxproj?rev=124631&r1=124630&r2=124631&view=diff
==============================================================================
--- lldb/trunk/lldb.xcodeproj/project.pbxproj (original)
+++ lldb/trunk/lldb.xcodeproj/project.pbxproj Mon Jan 31 18:04:43 2011
@@ -15,10 +15,6 @@
2618D7921240116900F2B8FE /* SectionLoadList.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 2618D7911240116900F2B8FE /* SectionLoadList.cpp */; };
2618D9EB12406FE600F2B8FE /* NameToDIE.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 2618D9EA12406FE600F2B8FE /* NameToDIE.cpp */; };
261B5A5411C3F2AD00AABD0A /* SharingPtr.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 261B5A5211C3F2AD00AABD0A /* SharingPtr.cpp */; };
- 2621C9CD12EA009300711A30 /* EmulateInstructionARM.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 2621C9CB12EA009300711A30 /* EmulateInstructionARM.cpp */; };
- 2621C9CE12EA009300711A30 /* EmulateInstruction.h in Headers */ = {isa = PBXBuildFile; fileRef = 2621C9CC12EA009300711A30 /* EmulateInstruction.h */; };
- 2621C9D012EA066500711A30 /* EmulateInstructionARM.h in Headers */ = {isa = PBXBuildFile; fileRef = 2621C9CF12EA066500711A30 /* EmulateInstructionARM.h */; };
- 2621CA0B12EA107700711A30 /* EmulateInstruction.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 2621CA0A12EA107700711A30 /* EmulateInstruction.cpp */; };
262CFC7711A4510000946C6C /* debugserver in Resources */ = {isa = PBXBuildFile; fileRef = 26CE05A0115C31E50022F371 /* debugserver */; };
2635DA87127D0D0400675BC1 /* SharingPtr.h in Headers */ = {isa = PBXBuildFile; fileRef = 261B5A5311C3F2AD00AABD0A /* SharingPtr.h */; settings = {ATTRIBUTES = (Public, ); }; };
26368A3C126B697600E8659F /* darwin-debug.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 26368A3B126B697600E8659F /* darwin-debug.cpp */; };
@@ -291,6 +287,10 @@
26D5B15611B07550009A862E /* CommandObjectArgs.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 499F381F11A5B3F300F5CE02 /* CommandObjectArgs.cpp */; };
26D5B15A11B07550009A862E /* UnwindMacOSXFrameBackchain.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 26E3EEE311A9901300FBADB6 /* UnwindMacOSXFrameBackchain.cpp */; };
26D5B15B11B07550009A862E /* RegisterContextMacOSXFrameBackchain.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 26E3EEF711A994E800FBADB6 /* RegisterContextMacOSXFrameBackchain.cpp */; };
+ 26D9FDC712F784E60003F2EE /* EmulateInstruction.h in Headers */ = {isa = PBXBuildFile; fileRef = 26D9FDC612F784E60003F2EE /* EmulateInstruction.h */; };
+ 26D9FDC912F784FD0003F2EE /* EmulateInstruction.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 26D9FDC812F784FD0003F2EE /* EmulateInstruction.cpp */; };
+ 26D9FDCE12F7853F0003F2EE /* EmulateInstructionARM.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 26D9FDCC12F7853F0003F2EE /* EmulateInstructionARM.cpp */; };
+ 26D9FDCF12F7853F0003F2EE /* EmulateInstructionARM.h in Headers */ = {isa = PBXBuildFile; fileRef = 26D9FDCD12F7853F0003F2EE /* EmulateInstructionARM.h */; };
26DE1E6B11616C2E00A093E2 /* lldb-forward-rtti.h in Headers */ = {isa = PBXBuildFile; fileRef = 26DE1E6911616C2E00A093E2 /* lldb-forward-rtti.h */; settings = {ATTRIBUTES = (Public, ); }; };
26DE1E6C11616C2E00A093E2 /* lldb-forward.h in Headers */ = {isa = PBXBuildFile; fileRef = 26DE1E6A11616C2E00A093E2 /* lldb-forward.h */; settings = {ATTRIBUTES = (Public, ); }; };
26DE204111618AB900A093E2 /* SBSymbolContext.h in Headers */ = {isa = PBXBuildFile; fileRef = 26DE204011618AB900A093E2 /* SBSymbolContext.h */; settings = {ATTRIBUTES = (Public, ); }; };
@@ -547,10 +547,6 @@
261B5A5311C3F2AD00AABD0A /* SharingPtr.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = SharingPtr.h; path = include/lldb/Utility/SharingPtr.h; sourceTree = "<group>"; };
261E18CC1148966100BADCD3 /* GDBRemoteRegisterContext.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = GDBRemoteRegisterContext.h; path = "source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.h"; sourceTree = "<group>"; };
261E18CD1148966100BADCD3 /* GDBRemoteRegisterContext.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = GDBRemoteRegisterContext.cpp; path = "source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp"; sourceTree = "<group>"; };
- 2621C9CB12EA009300711A30 /* EmulateInstructionARM.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = EmulateInstructionARM.cpp; path = Utility/EmulateInstructionARM.cpp; sourceTree = "<group>"; };
- 2621C9CC12EA009300711A30 /* EmulateInstruction.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = EmulateInstruction.h; path = Utility/EmulateInstruction.h; sourceTree = "<group>"; };
- 2621C9CF12EA066500711A30 /* EmulateInstructionARM.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = EmulateInstructionARM.h; path = Utility/EmulateInstructionARM.h; sourceTree = "<group>"; };
- 2621CA0A12EA107700711A30 /* EmulateInstruction.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = EmulateInstruction.cpp; path = Utility/EmulateInstruction.cpp; sourceTree = "<group>"; };
263664921140A4930075843B /* Debugger.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = Debugger.cpp; path = source/Core/Debugger.cpp; sourceTree = "<group>"; };
263664941140A4C10075843B /* Debugger.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = Debugger.h; path = include/lldb/Core/Debugger.h; sourceTree = "<group>"; };
26368A3B126B697600E8659F /* darwin-debug.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = "darwin-debug.cpp"; path = "tools/darwin-debug/darwin-debug.cpp"; sourceTree = "<group>"; };
@@ -878,6 +874,10 @@
26D0DD5510FE555900271C65 /* BreakpointResolverName.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = BreakpointResolverName.cpp; path = source/Breakpoint/BreakpointResolverName.cpp; sourceTree = "<group>"; };
26D27C9D11ED3A4E0024D721 /* ELFHeader.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = ELFHeader.cpp; sourceTree = "<group>"; };
26D27C9E11ED3A4E0024D721 /* ELFHeader.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = ELFHeader.h; sourceTree = "<group>"; };
+ 26D9FDC612F784E60003F2EE /* EmulateInstruction.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = EmulateInstruction.h; path = include/lldb/Core/EmulateInstruction.h; sourceTree = "<group>"; };
+ 26D9FDC812F784FD0003F2EE /* EmulateInstruction.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = EmulateInstruction.cpp; path = source/Core/EmulateInstruction.cpp; sourceTree = "<group>"; };
+ 26D9FDCC12F7853F0003F2EE /* EmulateInstructionARM.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = EmulateInstructionARM.cpp; path = Instruction/ARM/EmulateInstructionARM.cpp; sourceTree = "<group>"; };
+ 26D9FDCD12F7853F0003F2EE /* EmulateInstructionARM.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = EmulateInstructionARM.h; path = Instruction/ARM/EmulateInstructionARM.h; sourceTree = "<group>"; };
26DAFD9711529BC7005A394E /* ExecutionContextScope.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = ExecutionContextScope.h; path = include/lldb/Target/ExecutionContextScope.h; sourceTree = "<group>"; };
26DE1E6911616C2E00A093E2 /* lldb-forward-rtti.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = "lldb-forward-rtti.h"; path = "include/lldb/lldb-forward-rtti.h"; sourceTree = "<group>"; };
26DE1E6A11616C2E00A093E2 /* lldb-forward.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = "lldb-forward.h"; path = "include/lldb/lldb-forward.h"; sourceTree = "<group>"; };
@@ -1195,6 +1195,7 @@
493C63D711891A8000914D5E /* ABI */,
260C897210F57C5600BB2B04 /* Disassembler */,
260C897810F57C5600BB2B04 /* DynamicLoader */,
+ 26D9FDCA12F785120003F2EE /* Instruction */,
4CB443651249446F00C13DC2 /* LanguageRuntime */,
260C897E10F57C5600BB2B04 /* ObjectContainer */,
260C898210F57C5600BB2B04 /* ObjectFile */,
@@ -1616,10 +1617,6 @@
B2D3033612EFA5C500F84EB3 /* InstructionUtils.h */,
B287E63E12EFAE2C00C9BEFE /* ARMDefines.h */,
B23DD24F12EDFAC1000C3894 /* ARMUtils.h */,
- 2621C9CC12EA009300711A30 /* EmulateInstruction.h */,
- 2621CA0A12EA107700711A30 /* EmulateInstruction.cpp */,
- 2621C9CF12EA066500711A30 /* EmulateInstructionARM.h */,
- 2621C9CB12EA009300711A30 /* EmulateInstructionARM.cpp */,
AF68D32F1255A110002FF25B /* UnwindLLDB.cpp */,
AF68D3301255A110002FF25B /* UnwindLLDB.h */,
AF68D2541255416E002FF25B /* RegisterContextLLDB.cpp */,
@@ -1681,6 +1678,8 @@
26BC7E7610F1B85900F91463 /* Disassembler.cpp */,
26BC7D5F10F1B77400F91463 /* dwarf.h */,
26BC7E7710F1B85900F91463 /* DynamicLoader.cpp */,
+ 26D9FDC612F784E60003F2EE /* EmulateInstruction.h */,
+ 26D9FDC812F784FD0003F2EE /* EmulateInstruction.cpp */,
26BC7D6010F1B77400F91463 /* Error.h */,
26BC7E7810F1B85900F91463 /* Error.cpp */,
26BC7D6110F1B77400F91463 /* Event.h */,
@@ -2106,6 +2105,23 @@
name = MacOSX;
sourceTree = "<group>";
};
+ 26D9FDCA12F785120003F2EE /* Instruction */ = {
+ isa = PBXGroup;
+ children = (
+ 26D9FDCB12F785270003F2EE /* ARM */,
+ );
+ name = Instruction;
+ sourceTree = "<group>";
+ };
+ 26D9FDCB12F785270003F2EE /* ARM */ = {
+ isa = PBXGroup;
+ children = (
+ 26D9FDCD12F7853F0003F2EE /* EmulateInstructionARM.h */,
+ 26D9FDCC12F7853F0003F2EE /* EmulateInstructionARM.cpp */,
+ );
+ name = ARM;
+ sourceTree = "<group>";
+ };
26F5C22410F3D950009D5894 /* Tools */ = {
isa = PBXGroup;
children = (
@@ -2310,11 +2326,11 @@
266A42D8128E40040090CF7C /* ClangNamespaceDecl.h in Headers */,
26E6902F129C6BD500DDECD9 /* ClangExternalASTSourceCallbacks.h in Headers */,
4C7CF7E41295E10E00B4FBB5 /* ThreadPlanCallUserExpression.h in Headers */,
- 2621C9CE12EA009300711A30 /* EmulateInstruction.h in Headers */,
- 2621C9D012EA066500711A30 /* EmulateInstructionARM.h in Headers */,
B23DD25012EDFAC1000C3894 /* ARMUtils.h in Headers */,
B2D3033712EFA5C500F84EB3 /* InstructionUtils.h in Headers */,
B287E63F12EFAE2C00C9BEFE /* ARMDefines.h in Headers */,
+ 26D9FDC712F784E60003F2EE /* EmulateInstruction.h in Headers */,
+ 26D9FDCF12F7853F0003F2EE /* EmulateInstructionARM.h in Headers */,
);
runOnlyForDeploymentPostprocessing = 0;
};
@@ -2816,8 +2832,8 @@
26E69031129C6BEF00DDECD9 /* ClangExternalASTSourceCallbacks.cpp in Sources */,
4C7CF7E61295E12B00B4FBB5 /* ThreadPlanCallUserExpression.cpp in Sources */,
B296983712C2FB98002D92C3 /* CommandObjectVersion.cpp in Sources */,
- 2621C9CD12EA009300711A30 /* EmulateInstructionARM.cpp in Sources */,
- 2621CA0B12EA107700711A30 /* EmulateInstruction.cpp in Sources */,
+ 26D9FDC912F784FD0003F2EE /* EmulateInstruction.cpp in Sources */,
+ 26D9FDCE12F7853F0003F2EE /* EmulateInstructionARM.cpp in Sources */,
);
runOnlyForDeploymentPostprocessing = 0;
};
Modified: lldb/trunk/lldb.xcodeproj/xcshareddata/xcschemes/lldb-tool.xcscheme
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/lldb.xcodeproj/xcshareddata/xcschemes/lldb-tool.xcscheme?rev=124631&r1=124630&r2=124631&view=diff
==============================================================================
--- lldb/trunk/lldb.xcodeproj/xcshareddata/xcschemes/lldb-tool.xcscheme (original)
+++ lldb/trunk/lldb.xcodeproj/xcshareddata/xcschemes/lldb-tool.xcscheme Mon Jan 31 18:04:43 2011
@@ -28,6 +28,12 @@
buildConfiguration = "Debug">
<Testables>
</Testables>
+ <CommandLineArguments>
+ <CommandLineArgument
+ argument = "/Volumes/work/gclayton/Documents/src/attach/a.out"
+ isEnabled = "YES">
+ </CommandLineArgument>
+ </CommandLineArguments>
<EnvironmentVariables>
<EnvironmentVariable
key = "LLDB_LAUNCH_FLAG_DISABLE_ASLR"
@@ -56,7 +62,7 @@
</EnvironmentVariable>
<EnvironmentVariable
key = "LLDB_DEBUGSERVER_LOG_FLAGS"
- value = "0x800e0e"
+ value = "0x802e0e"
isEnabled = "YES">
</EnvironmentVariable>
</EnvironmentVariables>
@@ -78,6 +84,12 @@
ReferencedContainer = "container:lldb.xcodeproj">
</BuildableReference>
</BuildableProductRunnable>
+ <CommandLineArguments>
+ <CommandLineArgument
+ argument = "/Volumes/work/gclayton/Documents/src/attach/a.out"
+ isEnabled = "YES">
+ </CommandLineArgument>
+ </CommandLineArguments>
<EnvironmentVariables>
<EnvironmentVariable
key = "LLDB_LAUNCH_FLAG_DISABLE_ASLR"
@@ -106,7 +118,7 @@
</EnvironmentVariable>
<EnvironmentVariable
key = "LLDB_DEBUGSERVER_LOG_FLAGS"
- value = "0x800e0e"
+ value = "0x802e0e"
isEnabled = "YES">
</EnvironmentVariable>
</EnvironmentVariables>
@@ -129,6 +141,12 @@
ReferencedContainer = "container:lldb.xcodeproj">
</BuildableReference>
</BuildableProductRunnable>
+ <CommandLineArguments>
+ <CommandLineArgument
+ argument = "/Volumes/work/gclayton/Documents/src/attach/a.out"
+ isEnabled = "YES">
+ </CommandLineArgument>
+ </CommandLineArguments>
<EnvironmentVariables>
<EnvironmentVariable
key = "LLDB_LAUNCH_FLAG_DISABLE_ASLR"
@@ -157,7 +175,7 @@
</EnvironmentVariable>
<EnvironmentVariable
key = "LLDB_DEBUGSERVER_LOG_FLAGS"
- value = "0x800e0e"
+ value = "0x802e0e"
isEnabled = "YES">
</EnvironmentVariable>
</EnvironmentVariables>
Copied: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp (from r124630, lldb/trunk/source/Plugins/Process/Utility/EmulateInstructionARM.cpp)
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp?p2=lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp&p1=lldb/trunk/source/Plugins/Process/Utility/EmulateInstructionARM.cpp&r1=124630&r2=124631&rev=124631&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/EmulateInstructionARM.cpp (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp Mon Jan 31 18:04:43 2011
@@ -8,9 +8,11 @@
//===----------------------------------------------------------------------===//
#include "EmulateInstructionARM.h"
+#include "lldb/Core/ConstString.h"
+
#include "ARMDefines.h"
#include "ARMUtils.h"
-#include "lldb/Core/ConstString.h"
+#include "ARM_DWARF_Registers.h"
using namespace lldb;
using namespace lldb_private;
Copied: lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.h (from r124630, lldb/trunk/source/Plugins/Process/Utility/EmulateInstructionARM.h)
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.h?p2=lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.h&p1=lldb/trunk/source/Plugins/Process/Utility/EmulateInstructionARM.h&r1=124630&r2=124631&rev=124631&view=diff
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/EmulateInstructionARM.h (original)
+++ lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.h Mon Jan 31 18:04:43 2011
@@ -10,9 +10,7 @@
#ifndef lldb_EmulateInstructionARM_h_
#define lldb_EmulateInstructionARM_h_
-#include "EmulateInstruction.h"
-#include "ARM_DWARF_Registers.h"
-
+#include "lldb/Core/EmulateInstruction.h"
#include "lldb/Core/Error.h"
namespace lldb_private {
Removed: lldb/trunk/source/Plugins/Process/Utility/EmulateInstruction.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/EmulateInstruction.cpp?rev=124630&view=auto
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/EmulateInstruction.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/EmulateInstruction.cpp (removed)
@@ -1,98 +0,0 @@
-//===-- EmulateInstruction.h ------------------------------------*- C++ -*-===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#include "EmulateInstruction.h"
-
-#include "lldb/Core/DataExtractor.h"
-#include "lldb/Core/StreamString.h"
-using namespace lldb;
-using namespace lldb_private;
-
-
-EmulateInstruction::EmulateInstruction
-(
- lldb::ByteOrder byte_order,
- uint32_t addr_byte_size,
- void *baton,
- ReadMemory read_mem_callback,
- WriteMemory write_mem_callback,
- ReadRegister read_reg_callback,
- WriteRegister write_reg_callback
-) :
- m_byte_order (lldb::eByteOrderHost),
- m_addr_byte_size (sizeof (void *)),
- m_baton (baton),
- m_read_mem_callback (read_mem_callback),
- m_write_mem_callback (write_mem_callback),
- m_read_reg_callback (read_reg_callback),
- m_write_reg_callback (write_reg_callback),
- m_inst_pc (LLDB_INVALID_ADDRESS)
-{
- ::bzero (&m_inst, sizeof (m_inst));
-}
-
-uint64_t
-EmulateInstruction::ReadRegisterUnsigned (uint32_t reg_kind, uint32_t reg_num, uint64_t fail_value, bool *success_ptr)
-{
- uint64_t uval64 = 0;
- bool success = m_read_reg_callback (m_baton, reg_kind, reg_num, uval64);
- if (success_ptr)
- *success_ptr = success;
- if (!success)
- uval64 = fail_value;
- return uval64;
-}
-
-bool
-EmulateInstruction::WriteRegisterUnsigned (const Context &context, uint32_t reg_kind, uint32_t reg_num, uint64_t reg_value)
-{
- return m_write_reg_callback (m_baton, context, reg_kind, reg_num, reg_value);
-}
-
-uint64_t
-EmulateInstruction::ReadMemoryUnsigned (const Context &context, lldb::addr_t addr, size_t byte_size, uint64_t fail_value, bool *success_ptr)
-{
- uint64_t uval64 = 0;
- bool success = false;
- if (byte_size <= 8)
- {
- uint8_t buf[sizeof(uint64_t)];
- size_t bytes_read = m_read_mem_callback (m_baton, context, addr, buf, byte_size);
- if (bytes_read == byte_size)
- {
- uint32_t offset = 0;
- DataExtractor data (buf, byte_size, m_byte_order, m_addr_byte_size);
- uval64 = data.GetMaxU64 (&offset, byte_size);
- success = true;
- }
- }
-
- if (success_ptr)
- *success_ptr = success;
-
- if (!success)
- uval64 = fail_value;
- return uval64;
-}
-
-
-bool
-EmulateInstruction::WriteMemoryUnsigned (const Context &context,
- lldb::addr_t addr,
- uint64_t uval,
- size_t uval_byte_size)
-{
- StreamString strm(Stream::eBinary, GetAddressByteSize(), GetByteOrder());
- strm.PutMaxHex64 (uval, uval_byte_size);
-
- size_t bytes_written = m_write_mem_callback (m_baton, context, addr, strm.GetData(), uval_byte_size);
- if (bytes_written == uval_byte_size)
- return true;
- return false;
-}
Removed: lldb/trunk/source/Plugins/Process/Utility/EmulateInstruction.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/EmulateInstruction.h?rev=124630&view=auto
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/EmulateInstruction.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/EmulateInstruction.h (removed)
@@ -1,280 +0,0 @@
-//===-- EmulateInstruction.h ------------------------------------*- C++ -*-===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef lldb_EmulateInstruction_h_
-#define lldb_EmulateInstruction_h_
-
-#include "lldb/lldb-include.h"
-#include "lldb/Core/PluginInterface.h"
-
-//----------------------------------------------------------------------
-/// @class EmulateInstruction EmulateInstruction.h "lldb/Core/EmulateInstruction.h"
-/// @brief A class that allows emulation of CPU opcodes.
-///
-/// This class is a plug-in interface that is accessed through the
-/// standard static FindPlugin function call in the EmulateInstruction
-/// class. The FindPlugin takes a target triple and returns a new object
-/// if there is a plug-in that supports the architecture and OS. Four
-/// callbacks and a baton are provided. The four callbacks are read
-/// register, write register, read memory and write memory.
-///
-/// This class is currently designed for these main use cases:
-/// - Auto generation of Call Frame Information (CFI) from assembly code
-/// - Predicting single step breakpoint locations
-/// - Emulating instructions for breakpoint traps
-///
-/// Objects can be asked to read an instruction which will cause a call
-/// to the read register callback to get the PC, followed by a read
-/// memory call to read the opcode. If ReadInstruction () returns true,
-/// then a call to EmulateInstruction::EvaluateInstruction () can be
-/// made. At this point the EmulateInstruction subclass will use all of
-/// the callbacks to emulate an instruction.
-///
-/// Clients that provide the callbacks can either do the read/write
-/// registers/memory to actually emulate the instruction on a real or
-/// virtual CPU, or watch for the EmulateInstruction::Context which
-/// is context for the read/write register/memory which explains why
-/// the callback is being called. Examples of a context are:
-/// "pushing register 3 onto the stack at offset -12", or "adjusting
-/// stack pointer by -16". This extra context allows the generation of
-/// CFI information from assembly code without having to actually do
-/// the read/write register/memory.
-///
-/// Clients must be prepared that not all instructions for an
-/// Instruction Set Architecture (ISA) will be emulated.
-///
-/// Subclasses at the very least should implement the instructions that
-/// save and restore regiters onto the stack and adjustment to the stack
-/// pointer. By just implementing a few instructions for an ISA that are
-/// the typical prologue opcodes, you can then generate CFI using a
-/// class that will soon be available.
-///
-/// Implmenting all of the instructions that affect the PC can then
-/// allow single step prediction support.
-///
-/// Implmenting all of the instructions allows for emulation of opcodes
-/// for breakpoint traps and will pave the way for "thread centric"
-/// debugging. The current debugging model is "process centric" where
-/// all threads must be stopped when any thread is stopped since when
-/// hitting software breakpoints once must disable the breakpoint by
-/// restoring the original breakpoint opcde, single stepping and
-/// restoring the breakpoint trap. If all threads were allowed to run
-/// then other threads could miss the breakpoint.
-///
-/// This class centralizes the code that usually is done in separate
-/// code paths in a debugger (single step prediction, finding save
-/// restore locations of registers for unwinding stack frame variables,
-/// and emulating the intruction is just a bonus.
-//----------------------------------------------------------------------
-
-namespace lldb_private {
-
-class EmulateInstruction :
- public PluginInterface
-{
-public:
-
- static Disassembler*
- FindPlugin (const ArchSpec &arch);
-
- enum ContextType
- {
- eContextInvalid = 0,
- // Read an instruciton opcode from memory
- eContextReadOpcode,
-
- // Usually used for writing a register value whose source value in an
- // immediate
- eContextImmediate,
-
- // Exclusively used when saving a register to the stack as part of the
- // prologue
- // arg0 = register kind
- // arg1 = register number
- // arg2 = signed offset from current SP value where register is being
- // stored
- eContextPushRegisterOnStack,
-
- // Exclusively used when restoring a register off the stack as part of
- // the epilogue
- // arg0 = register kind
- // arg1 = register number
- // arg2 = signed offset from current SP value where register is being
- // restored
- eContextPopRegisterOffStack,
-
- // Add or subtract a value from the stack
- // arg0 = register kind for SP
- // arg1 = register number for SP
- // arg2 = signed offset being applied to the SP value
- eContextAdjustStackPointer,
-
- // Used in WriteRegister callbacks to indicate where the
- // arg0 = source register kind
- // arg1 = source register number
- // arg2 = source signed offset
- eContextRegisterPlusOffset,
- };
-
- struct Context
- {
- ContextType type;
- lldb::addr_t arg0; // Register kind.
- lldb::addr_t arg1; // Register spec.
- int64_t arg2; // Possible negative value.
- };
-
- union Opcode
- {
- uint8_t inst8;
- uint16_t inst16;
- uint32_t inst32;
- uint64_t inst64;
- union inst
- {
- uint8_t bytes[16];
- uint8_t length;
- };
- };
-
- enum OpcodeType
- {
- eOpcode8,
- eOpcode16,
- eOpcode32,
- eOpcode64,
- eOpcodeBytes,
- };
-
- struct Instruction
- {
- OpcodeType opcode_type;
- Opcode opcode;
- };
-
- typedef size_t (*ReadMemory) (void *baton,
- const Context &context,
- lldb::addr_t addr,
- void *dst,
- size_t length);
-
- typedef size_t (*WriteMemory) (void *baton,
- const Context &context,
- lldb::addr_t addr,
- const void *dst,
- size_t length);
-
- typedef bool (*ReadRegister) (void *baton,
- uint32_t reg_kind,
- uint32_t reg_num,
- uint64_t ®_value);
-
- typedef bool (*WriteRegister) (void *baton,
- const Context &context,
- uint32_t reg_kind,
- uint32_t reg_num,
- uint64_t reg_value);
-
- EmulateInstruction (lldb::ByteOrder byte_order,
- uint32_t addr_byte_size,
- void *baton,
- ReadMemory read_mem_callback,
- WriteMemory write_mem_callback,
- ReadRegister read_reg_callback,
- WriteRegister write_reg_callback);
-
- virtual ~EmulateInstruction()
- {
- }
-
- virtual bool
- SetTargetTriple (const ConstString &triple) = 0;
-
- virtual bool
- ReadInstruction () = 0;
-
- virtual bool
- EvaluateInstruction () = 0;
-
- uint64_t
- ReadRegisterUnsigned (uint32_t reg_kind,
- uint32_t reg_num,
- uint64_t fail_value,
- bool *success_ptr);
-
- bool
- WriteRegisterUnsigned (const Context &context,
- uint32_t reg_kind,
- uint32_t reg_num,
- uint64_t reg_value);
-
- uint64_t
- ReadMemoryUnsigned (const Context &context,
- lldb::addr_t addr,
- size_t byte_size,
- uint64_t fail_value,
- bool *success_ptr);
-
- bool
- WriteMemoryUnsigned (const Context &context,
- lldb::addr_t addr,
- uint64_t uval,
- size_t uval_byte_size);
-
- uint32_t
- GetAddressByteSize () const
- {
- return m_addr_byte_size;
- }
-
- lldb::ByteOrder
- GetByteOrder () const
- {
- return m_byte_order;
- }
-
- uint64_t
- OpcodeAsUnsigned (bool *success_ptr)
- {
- if (success_ptr)
- *success_ptr = true;
- switch (m_inst.opcode_type)
- {
- eOpcode8: return m_inst.opcode.inst8;
- eOpcode16: return m_inst.opcode.inst16;
- eOpcode32: return m_inst.opcode.inst32;
- eOpcode64: return m_inst.opcode.inst64;
- eOpcodeBytes:
- break;
- }
- if (success_ptr)
- *success_ptr = false;
- return 0;
- }
-
-protected:
- lldb::ByteOrder m_byte_order;
- uint32_t m_addr_byte_size;
- void * m_baton;
- ReadMemory m_read_mem_callback;
- WriteMemory m_write_mem_callback;
- ReadRegister m_read_reg_callback;
- WriteRegister m_write_reg_callback;
-
- lldb::addr_t m_inst_pc;
- Instruction m_inst;
- //------------------------------------------------------------------
- // For EmulateInstruction only
- //------------------------------------------------------------------
- DISALLOW_COPY_AND_ASSIGN (EmulateInstruction);
-};
-
-} // namespace lldb_private
-
-#endif // lldb_EmulateInstruction_h_
Removed: lldb/trunk/source/Plugins/Process/Utility/EmulateInstructionARM.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/EmulateInstructionARM.cpp?rev=124630&view=auto
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/EmulateInstructionARM.cpp (original)
+++ lldb/trunk/source/Plugins/Process/Utility/EmulateInstructionARM.cpp (removed)
@@ -1,1243 +0,0 @@
-//===-- EmulateInstructionARM.cpp -------------------------------*- C++ -*-===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#include "EmulateInstructionARM.h"
-#include "ARMDefines.h"
-#include "ARMUtils.h"
-#include "lldb/Core/ConstString.h"
-
-using namespace lldb;
-using namespace lldb_private;
-
-// ARM constants used during decoding
-#define REG_RD 0
-#define LDM_REGLIST 1
-#define PC_REG 15
-#define PC_REGLIST_BIT 0x8000
-
-#define ARMv4 (1u << 0)
-#define ARMv4T (1u << 1)
-#define ARMv5T (1u << 2)
-#define ARMv5TE (1u << 3)
-#define ARMv5TEJ (1u << 4)
-#define ARMv6 (1u << 5)
-#define ARMv6K (1u << 6)
-#define ARMv6T2 (1u << 7)
-#define ARMv7 (1u << 8)
-#define ARMv8 (1u << 9)
-#define ARMvAll (0xffffffffu)
-
-typedef enum
-{
- eEncodingA1,
- eEncodingA2,
- eEncodingA3,
- eEncodingA4,
- eEncodingA5,
- eEncodingT1,
- eEncodingT2,
- eEncodingT3,
- eEncodingT4,
- eEncodingT5,
-} ARMEncoding;
-
-typedef enum
-{
- eSize16,
- eSize32
-} ARMInstrSize;
-
-// Typedef for the callback function used during the emulation.
-// Pass along (ARMEncoding)encoding as the callback data.
-typedef bool (*EmulateCallback) (EmulateInstructionARM *emulator, ARMEncoding encoding);
-
-typedef struct
-{
- uint32_t mask;
- uint32_t value;
- uint32_t variants;
- ARMEncoding encoding;
- ARMInstrSize size;
- EmulateCallback callback;
- const char *name;
-} ARMOpcode;
-
-// Push Multiple Registers stores multiple registers to the stack, storing to
-// consecutive memory locations ending just below the address in SP, and updates
-// SP to point to the start of the stored data.
-static bool
-emulate_push (EmulateInstructionARM *emulator, ARMEncoding encoding)
-{
-#if 0
- // ARM pseudo code...
- if (ConditionPassed())
- {
- EncodingSpecificOperations();
- NullCheckIfThumbEE(13);
- address = SP - 4*BitCount(registers);
-
- for (i = 0 to 14)
- {
- if (registers<i> == â1â)
- {
- if i == 13 && i != LowestSetBit(registers) // Only possible for encoding A1
- MemA[address,4] = bits(32) UNKNOWN;
- else
- MemA[address,4] = R[i];
- address = address + 4;
- }
- }
-
- if (registers<15> == â1â) // Only possible for encoding A1 or A2
- MemA[address,4] = PCStoreValue();
-
- SP = SP - 4*BitCount(registers);
- }
-#endif
-
- bool success = false;
- const uint32_t opcode = emulator->OpcodeAsUnsigned (&success);
- if (!success)
- return false;
-
- if (emulator->ConditionPassed())
- {
- const uint32_t addr_byte_size = emulator->GetAddressByteSize();
- const addr_t sp = emulator->ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success);
- if (!success)
- return false;
- uint32_t registers = 0;
- uint32_t Rt; // the source register
- switch (encoding) {
- case eEncodingT1:
- registers = Bits32(opcode, 7, 0);
- // The M bit represents LR.
- if (Bits32(opcode, 8, 8))
- registers |= (1u << 14);
- // if BitCount(registers) < 1 then UNPREDICTABLE;
- if (BitCount(registers) < 1)
- return false;
- break;
- case eEncodingT2:
- // Ignore bits 15 & 13.
- registers = Bits32(opcode, 15, 0) & ~0xa000;
- // if BitCount(registers) < 2 then UNPREDICTABLE;
- if (BitCount(registers) < 2)
- return false;
- break;
- case eEncodingT3:
- Rt = Bits32(opcode, 15, 12);
- // if BadReg(t) then UNPREDICTABLE;
- if (BadReg(Rt))
- return false;
- registers = (1u << Rt);
- break;
- case eEncodingA1:
- registers = Bits32(opcode, 15, 0);
- // Instead of return false, let's handle the following case as well,
- // which amounts to pushing one reg onto the full descending stacks.
- // if BitCount(register_list) < 2 then SEE STMDB / STMFD;
- break;
- case eEncodingA2:
- Rt = Bits32(opcode, 15, 12);
- // if t == 13 then UNPREDICTABLE;
- if (Rt == dwarf_sp)
- return false;
- registers = (1u << Rt);
- break;
- default:
- return false;
- }
- addr_t sp_offset = addr_byte_size * BitCount (registers);
- addr_t addr = sp - sp_offset;
- uint32_t i;
-
- EmulateInstruction::Context context = { EmulateInstruction::eContextPushRegisterOnStack, eRegisterKindDWARF, 0, 0 };
- for (i=0; i<15; ++i)
- {
- if (BitIsSet (registers, 1u << i))
- {
- context.arg1 = dwarf_r0 + i; // arg1 in the context is the DWARF register number
- context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset
- uint32_t reg_value = emulator->ReadRegisterUnsigned(eRegisterKindDWARF, context.arg1, 0, &success);
- if (!success)
- return false;
- if (!emulator->WriteMemoryUnsigned (context, addr, reg_value, addr_byte_size))
- return false;
- addr += addr_byte_size;
- }
- }
-
- if (BitIsSet (registers, 1u << 15))
- {
- context.arg1 = dwarf_pc; // arg1 in the context is the DWARF register number
- context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset
- const uint32_t pc = emulator->ReadRegisterUnsigned(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, 0, &success);
- if (!success)
- return false;
- if (!emulator->WriteMemoryUnsigned (context, addr, pc + 8, addr_byte_size))
- return false;
- }
-
- context.type = EmulateInstruction::eContextAdjustStackPointer;
- context.arg0 = eRegisterKindGeneric;
- context.arg1 = LLDB_REGNUM_GENERIC_SP;
- context.arg2 = -sp_offset;
-
- if (!emulator->WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, sp - sp_offset))
- return false;
- }
- return true;
-}
-
-// Pop Multiple Registers loads multiple registers from the stack, loading from
-// consecutive memory locations staring at the address in SP, and updates
-// SP to point just above the loaded data.
-static bool
-emulate_pop (EmulateInstructionARM *emulator, ARMEncoding encoding)
-{
-#if 0
- // ARM pseudo code...
- if (ConditionPassed())
- {
- EncodingSpecificOperations(); NullCheckIfThumbEE(13);
- address = SP;
- for i = 0 to 14
- if registers<i> == â1â then
- R[i} = if UnalignedAllowed then MemU[address,4] else MemA[address,4]; address = address + 4;
- if registers<15> == â1â then
- if UnalignedAllowed then
- LoadWritePC(MemU[address,4]);
- else
- LoadWritePC(MemA[address,4]);
- if registers<13> == â0â then SP = SP + 4*BitCount(registers);
- if registers<13> == â1â then SP = bits(32) UNKNOWN;
- }
-#endif
-
- bool success = false;
- const uint32_t opcode = emulator->OpcodeAsUnsigned (&success);
- if (!success)
- return false;
-
- if (emulator->ConditionPassed())
- {
- const uint32_t addr_byte_size = emulator->GetAddressByteSize();
- const addr_t sp = emulator->ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success);
- if (!success)
- return false;
- uint32_t registers = 0;
- uint32_t Rt; // the destination register
- switch (encoding) {
- case eEncodingT1:
- registers = Bits32(opcode, 7, 0);
- // The P bit represents PC.
- if (Bits32(opcode, 8, 8))
- registers |= (1u << 15);
- // if BitCount(registers) < 1 then UNPREDICTABLE;
- if (BitCount(registers) < 1)
- return false;
- break;
- case eEncodingT2:
- // Ignore bit 13.
- registers = Bits32(opcode, 15, 0) & ~0x2000;
- // if BitCount(registers) < 2 || (P == '1' && M == '1') then UNPREDICTABLE;
- if (BitCount(registers) < 2 || (Bits32(opcode, 15, 15) && Bits32(opcode, 14, 14)))
- return false;
- break;
- case eEncodingT3:
- Rt = Bits32(opcode, 15, 12);
- // if t == 13 || (t == 15 && InITBlock() && !LastInITBlock()) then UNPREDICTABLE;
- if (Rt == dwarf_sp)
- return false;
- registers = (1u << Rt);
- break;
- case eEncodingA1:
- registers = Bits32(opcode, 15, 0);
- // Instead of return false, let's handle the following case as well,
- // which amounts to popping one reg from the full descending stacks.
- // if BitCount(register_list) < 2 then SEE LDM / LDMIA / LDMFD;
-
- // if registers<13> == â1â && ArchVersion() >= 7 then UNPREDICTABLE;
- if (Bits32(opcode, 13, 13))
- return false;
- break;
- case eEncodingA2:
- Rt = Bits32(opcode, 15, 12);
- // if t == 13 then UNPREDICTABLE;
- if (Rt == dwarf_sp)
- return false;
- registers = (1u << Rt);
- break;
- default:
- return false;
- }
- addr_t sp_offset = addr_byte_size * BitCount (registers);
- addr_t addr = sp;
- uint32_t i, data;
-
- EmulateInstruction::Context context = { EmulateInstruction::eContextPopRegisterOffStack, eRegisterKindDWARF, 0, 0 };
- for (i=0; i<15; ++i)
- {
- if (BitIsSet (registers, 1u << i))
- {
- context.arg1 = dwarf_r0 + i; // arg1 in the context is the DWARF register number
- context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset
- data = emulator->ReadMemoryUnsigned(context, addr, 4, 0, &success);
- if (!success)
- return false;
- if (!emulator->WriteRegisterUnsigned(context, eRegisterKindDWARF, context.arg1, data))
- return false;
- addr += addr_byte_size;
- }
- }
-
- if (BitIsSet (registers, 1u << 15))
- {
- context.arg1 = dwarf_pc; // arg1 in the context is the DWARF register number
- context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset
- data = emulator->ReadMemoryUnsigned(context, addr, 4, 0, &success);
- if (!success)
- return false;
- if (!emulator->WriteRegisterUnsigned(context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, data))
- return false;
- addr += addr_byte_size;
- }
-
- context.type = EmulateInstruction::eContextAdjustStackPointer;
- context.arg0 = eRegisterKindGeneric;
- context.arg1 = LLDB_REGNUM_GENERIC_SP;
- context.arg2 = sp_offset;
-
- if (!emulator->WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, sp + sp_offset))
- return false;
- }
- return true;
-}
-
-// Set r7 or ip to point to saved value residing within the stack.
-// ADD (SP plus immediate)
-static bool
-emulate_add_rd_sp_imm (EmulateInstructionARM *emulator, ARMEncoding encoding)
-{
-#if 0
- // ARM pseudo code...
- if (ConditionPassed())
- {
- EncodingSpecificOperations();
- (result, carry, overflow) = AddWithCarry(SP, imm32, â0â);
- if d == 15 then
- ALUWritePC(result); // setflags is always FALSE here
- else
- R[d] = result;
- if setflags then
- APSR.N = result<31>;
- APSR.Z = IsZeroBit(result);
- APSR.C = carry;
- APSR.V = overflow;
- }
-#endif
-
- bool success = false;
- const uint32_t opcode = emulator->OpcodeAsUnsigned (&success);
- if (!success)
- return false;
-
- if (emulator->ConditionPassed())
- {
- const addr_t sp = emulator->ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success);
- if (!success)
- return false;
- uint32_t Rd; // the destination register
- uint32_t imm32;
- switch (encoding) {
- case eEncodingT1:
- Rd = 7;
- imm32 = Bits32(opcode, 7, 0) << 2; // imm32 = ZeroExtend(imm8:'00', 32)
- break;
- case eEncodingA1:
- Rd = Bits32(opcode, 15, 12);
- imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12)
- break;
- default:
- return false;
- }
- addr_t sp_offset = imm32;
- addr_t addr = sp + sp_offset; // a pointer to the stack area
-
- EmulateInstruction::Context context = { EmulateInstruction::eContextRegisterPlusOffset,
- eRegisterKindGeneric,
- LLDB_REGNUM_GENERIC_SP,
- sp_offset };
-
- if (!emulator->WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + Rd, addr))
- return false;
- }
- return true;
-}
-
-// Set r7 or ip to the current stack pointer.
-// MOV (register)
-static bool
-emulate_mov_rd_sp (EmulateInstructionARM *emulator, ARMEncoding encoding)
-{
-#if 0
- // ARM pseudo code...
- if (ConditionPassed())
- {
- EncodingSpecificOperations();
- result = R[m];
- if d == 15 then
- ALUWritePC(result); // setflags is always FALSE here
- else
- R[d] = result;
- if setflags then
- APSR.N = result<31>;
- APSR.Z = IsZeroBit(result);
- // APSR.C unchanged
- // APSR.V unchanged
- }
-#endif
-
- bool success = false;
- //const uint32_t opcode = emulator->OpcodeAsUnsigned (&success);
- //if (!success)
- // return false;
-
- if (emulator->ConditionPassed())
- {
- const addr_t sp = emulator->ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success);
- if (!success)
- return false;
- uint32_t Rd; // the destination register
- switch (encoding) {
- case eEncodingT1:
- Rd = 7;
- break;
- case eEncodingA1:
- Rd = 12;
- break;
- default:
- return false;
- }
- EmulateInstruction::Context context = { EmulateInstruction::eContextRegisterPlusOffset,
- eRegisterKindGeneric,
- LLDB_REGNUM_GENERIC_SP,
- 0 };
-
- if (!emulator->WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + Rd, sp))
- return false;
- }
- return true;
-}
-
-// Move from high register (r8-r15) to low register (r0-r7).
-// MOV (register)
-static bool
-emulate_mov_low_high (EmulateInstructionARM *emulator, ARMEncoding encoding)
-{
-#if 0
- // ARM pseudo code...
- if (ConditionPassed())
- {
- EncodingSpecificOperations();
- result = R[m];
- if d == 15 then
- ALUWritePC(result); // setflags is always FALSE here
- else
- R[d] = result;
- if setflags then
- APSR.N = result<31>;
- APSR.Z = IsZeroBit(result);
- // APSR.C unchanged
- // APSR.V unchanged
- }
-#endif
-
- bool success = false;
- const uint32_t opcode = emulator->OpcodeAsUnsigned (&success);
- if (!success)
- return false;
-
- if (emulator->ConditionPassed())
- {
- uint32_t Rm; // the source register
- uint32_t Rd; // the destination register
- switch (encoding) {
- case eEncodingT1:
- Rm = Bits32(opcode, 6, 3);
- Rd = Bits32(opcode, 2, 1); // bits(7) == 0
- break;
- default:
- return false;
- }
- int32_t reg_value = emulator->ReadRegisterUnsigned(eRegisterKindDWARF, dwarf_r0 + Rm, 0, &success);
- if (!success)
- return false;
-
- // The context specifies that Rm is to be moved into Rd.
- EmulateInstruction::Context context = { EmulateInstruction::eContextRegisterPlusOffset,
- eRegisterKindDWARF,
- dwarf_r0 + Rm,
- 0 };
-
- if (!emulator->WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + Rd, reg_value))
- return false;
- }
- return true;
-}
-
-// PC relative immediate load into register, possibly followed by ADD (SP plus register).
-// LDR (literal)
-static bool
-emulate_ldr_rd_pc_rel (EmulateInstructionARM *emulator, ARMEncoding encoding)
-{
-#if 0
- // ARM pseudo code...
- if (ConditionPassed())
- {
- EncodingSpecificOperations(); NullCheckIfThumbEE(15);
- base = Align(PC,4);
- address = if add then (base + imm32) else (base - imm32);
- data = MemU[address,4];
- if t == 15 then
- if address<1:0> == â00â then LoadWritePC(data); else UNPREDICTABLE;
- elsif UnalignedSupport() || address<1:0> = â00â then
- R[t] = data;
- else // Can only apply before ARMv7
- if CurrentInstrSet() == InstrSet_ARM then
- R[t] = ROR(data, 8*UInt(address<1:0>));
- else
- R[t] = bits(32) UNKNOWN;
- }
-#endif
-
- bool success = false;
- const uint32_t opcode = emulator->OpcodeAsUnsigned (&success);
- if (!success)
- return false;
-
- if (emulator->ConditionPassed())
- {
- const uint32_t pc = emulator->ReadRegisterUnsigned(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, 0, &success);
- if (!success)
- return false;
-
- // PC relative immediate load context
- EmulateInstruction::Context context = {EmulateInstruction::eContextRegisterPlusOffset,
- eRegisterKindGeneric,
- LLDB_REGNUM_GENERIC_PC,
- 0};
- uint32_t Rd; // the destination register
- uint32_t imm32; // immediate offset from the PC
- addr_t addr; // the PC relative address
- uint32_t data; // the literal data value from the PC relative load
- switch (encoding) {
- case eEncodingT1:
- Rd = Bits32(opcode, 10, 8);
- imm32 = Bits32(opcode, 7, 0) << 2; // imm32 = ZeroExtend(imm8:'00', 32);
- addr = pc + 4 + imm32;
- context.arg2 = 4 + imm32;
- break;
- default:
- return false;
- }
- data = emulator->ReadMemoryUnsigned(context, addr, 4, 0, &success);
- if (!success)
- return false;
- if (!emulator->WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + Rd, data))
- return false;
- }
- return true;
-}
-
-// An add operation to adjust the SP.
-// ADD (SP plus immediate)
-static bool
-emulate_add_sp_imm (EmulateInstructionARM *emulator, ARMEncoding encoding)
-{
-#if 0
- // ARM pseudo code...
- if (ConditionPassed())
- {
- EncodingSpecificOperations();
- (result, carry, overflow) = AddWithCarry(SP, imm32, â0â);
- if d == 15 then // Can only occur for ARM encoding
- ALUWritePC(result); // setflags is always FALSE here
- else
- R[d] = result;
- if setflags then
- APSR.N = result<31>;
- APSR.Z = IsZeroBit(result);
- APSR.C = carry;
- APSR.V = overflow;
- }
-#endif
-
- bool success = false;
- const uint32_t opcode = emulator->OpcodeAsUnsigned (&success);
- if (!success)
- return false;
-
- if (emulator->ConditionPassed())
- {
- const addr_t sp = emulator->ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success);
- if (!success)
- return false;
- uint32_t imm32; // the immediate operand
- switch (encoding) {
- case eEncodingT2:
- imm32 = ThumbImmScaled(opcode); // imm32 = ZeroExtend(imm7:'00', 32)
- break;
- default:
- return false;
- }
- addr_t sp_offset = imm32;
- addr_t addr = sp + sp_offset; // the adjusted stack pointer value
-
- EmulateInstruction::Context context = { EmulateInstruction::eContextAdjustStackPointer,
- eRegisterKindGeneric,
- LLDB_REGNUM_GENERIC_SP,
- sp_offset };
-
- if (!emulator->WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, addr))
- return false;
- }
- return true;
-}
-
-// An add operation to adjust the SP.
-// ADD (SP plus register)
-static bool
-emulate_add_sp_rm (EmulateInstructionARM *emulator, ARMEncoding encoding)
-{
-#if 0
- // ARM pseudo code...
- if (ConditionPassed())
- {
- EncodingSpecificOperations();
- shifted = Shift(R[m], shift_t, shift_n, APSR.C);
- (result, carry, overflow) = AddWithCarry(SP, shifted, â0â);
- if d == 15 then
- ALUWritePC(result); // setflags is always FALSE here
- else
- R[d] = result;
- if setflags then
- APSR.N = result<31>;
- APSR.Z = IsZeroBit(result);
- APSR.C = carry;
- APSR.V = overflow;
- }
-#endif
-
- bool success = false;
- const uint32_t opcode = emulator->OpcodeAsUnsigned (&success);
- if (!success)
- return false;
-
- if (emulator->ConditionPassed())
- {
- const addr_t sp = emulator->ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success);
- if (!success)
- return false;
- uint32_t Rm; // the second operand
- switch (encoding) {
- case eEncodingT2:
- Rm = Bits32(opcode, 6, 3);
- break;
- default:
- return false;
- }
- int32_t reg_value = emulator->ReadRegisterUnsigned(eRegisterKindDWARF, dwarf_r0 + Rm, 0, &success);
- if (!success)
- return false;
-
- addr_t addr = (int32_t)sp + reg_value; // the adjusted stack pointer value
-
- EmulateInstruction::Context context = { EmulateInstruction::eContextAdjustStackPointer,
- eRegisterKindGeneric,
- LLDB_REGNUM_GENERIC_SP,
- reg_value };
-
- if (!emulator->WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, addr))
- return false;
- }
- return true;
-}
-
-// Set r7 to point to some ip offset.
-// SUB (immediate)
-static bool
-emulate_sub_r7_ip_imm (EmulateInstructionARM *emulator, ARMEncoding encoding)
-{
-#if 0
- // ARM pseudo code...
- if (ConditionPassed())
- {
- EncodingSpecificOperations();
- (result, carry, overflow) = AddWithCarry(SP, NOT(imm32), â1â);
- if d == 15 then // Can only occur for ARM encoding
- ALUWritePC(result); // setflags is always FALSE here
- else
- R[d] = result;
- if setflags then
- APSR.N = result<31>;
- APSR.Z = IsZeroBit(result);
- APSR.C = carry;
- APSR.V = overflow;
- }
-#endif
-
- bool success = false;
- const uint32_t opcode = emulator->OpcodeAsUnsigned (&success);
- if (!success)
- return false;
-
- if (emulator->ConditionPassed())
- {
- const addr_t ip = emulator->ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r12, 0, &success);
- if (!success)
- return false;
- uint32_t imm32;
- switch (encoding) {
- case eEncodingA1:
- imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12)
- break;
- default:
- return false;
- }
- addr_t ip_offset = imm32;
- addr_t addr = ip - ip_offset; // the adjusted ip value
-
- EmulateInstruction::Context context = { EmulateInstruction::eContextRegisterPlusOffset,
- eRegisterKindDWARF,
- dwarf_r12,
- -ip_offset };
-
- if (!emulator->WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r7, addr))
- return false;
- }
- return true;
-}
-
-// Set ip to point to some stack offset.
-// SUB (SP minus immediate)
-static bool
-emulate_sub_ip_sp_imm (EmulateInstructionARM *emulator, ARMEncoding encoding)
-{
-#if 0
- // ARM pseudo code...
- if (ConditionPassed())
- {
- EncodingSpecificOperations();
- (result, carry, overflow) = AddWithCarry(SP, NOT(imm32), â1â);
- if d == 15 then // Can only occur for ARM encoding
- ALUWritePC(result); // setflags is always FALSE here
- else
- R[d] = result;
- if setflags then
- APSR.N = result<31>;
- APSR.Z = IsZeroBit(result);
- APSR.C = carry;
- APSR.V = overflow;
- }
-#endif
-
- bool success = false;
- const uint32_t opcode = emulator->OpcodeAsUnsigned (&success);
- if (!success)
- return false;
-
- if (emulator->ConditionPassed())
- {
- const addr_t sp = emulator->ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success);
- if (!success)
- return false;
- uint32_t imm32;
- switch (encoding) {
- case eEncodingA1:
- imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12)
- break;
- default:
- return false;
- }
- addr_t sp_offset = imm32;
- addr_t addr = sp - sp_offset; // the adjusted stack pointer value
-
- EmulateInstruction::Context context = { EmulateInstruction::eContextRegisterPlusOffset,
- eRegisterKindGeneric,
- LLDB_REGNUM_GENERIC_SP,
- -sp_offset };
-
- if (!emulator->WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r12, addr))
- return false;
- }
- return true;
-}
-
-// A sub operation to adjust the SP -- allocate space for local storage.
-static bool
-emulate_sub_sp_imm (EmulateInstructionARM *emulator, ARMEncoding encoding)
-{
-#if 0
- // ARM pseudo code...
- if (ConditionPassed())
- {
- EncodingSpecificOperations();
- (result, carry, overflow) = AddWithCarry(SP, NOT(imm32), â1â);
- if d == 15 then // Can only occur for ARM encoding
- ALUWritePC(result); // setflags is always FALSE here
- else
- R[d] = result;
- if setflags then
- APSR.N = result<31>;
- APSR.Z = IsZeroBit(result);
- APSR.C = carry;
- APSR.V = overflow;
- }
-#endif
-
- bool success = false;
- const uint32_t opcode = emulator->OpcodeAsUnsigned (&success);
- if (!success)
- return false;
-
- if (emulator->ConditionPassed())
- {
- const addr_t sp = emulator->ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success);
- if (!success)
- return false;
- uint32_t imm32;
- switch (encoding) {
- case eEncodingT1:
- imm32 = ThumbImmScaled(opcode); // imm32 = ZeroExtend(imm7:'00', 32)
- case eEncodingT2:
- imm32 = ThumbExpandImm(opcode); // imm32 = ThumbExpandImm(i:imm3:imm8)
- break;
- case eEncodingT3:
- imm32 = ThumbImm12(opcode); // imm32 = ZeroExtend(i:imm3:imm8, 32)
- break;
- case eEncodingA1:
- imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12)
- break;
- default:
- return false;
- }
- addr_t sp_offset = imm32;
- addr_t addr = sp - sp_offset; // the adjusted stack pointer value
-
- EmulateInstruction::Context context = { EmulateInstruction::eContextAdjustStackPointer,
- eRegisterKindGeneric,
- LLDB_REGNUM_GENERIC_SP,
- -sp_offset };
-
- if (!emulator->WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, addr))
- return false;
- }
- return true;
-}
-
-// A store operation to the stack that also updates the SP.
-static bool
-emulate_str_rt_sp (EmulateInstructionARM *emulator, ARMEncoding encoding)
-{
-#if 0
- // ARM pseudo code...
- if (ConditionPassed())
- {
- EncodingSpecificOperations();
- offset_addr = if add then (R[n] + imm32) else (R[n] - imm32);
- address = if index then offset_addr else R[n];
- MemU[address,4] = if t == 15 then PCStoreValue() else R[t];
- if wback then R[n] = offset_addr;
- }
-#endif
-
- bool success = false;
- const uint32_t opcode = emulator->OpcodeAsUnsigned (&success);
- if (!success)
- return false;
-
- if (emulator->ConditionPassed())
- {
- const uint32_t addr_byte_size = emulator->GetAddressByteSize();
- const addr_t sp = emulator->ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success);
- if (!success)
- return false;
- uint32_t Rt; // the source register
- uint32_t imm12;
- switch (encoding) {
- case eEncodingA1:
- Rt = Bits32(opcode, 15, 12);
- imm12 = Bits32(opcode, 11, 0);
- break;
- default:
- return false;
- }
- addr_t sp_offset = imm12;
- addr_t addr = sp - sp_offset;
-
- EmulateInstruction::Context context = { EmulateInstruction::eContextPushRegisterOnStack, eRegisterKindDWARF, 0, 0 };
- if (Rt != 15)
- {
- context.arg1 = dwarf_r0 + Rt; // arg1 in the context is the DWARF register number
- context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset
- uint32_t reg_value = emulator->ReadRegisterUnsigned(eRegisterKindDWARF, context.arg1, 0, &success);
- if (!success)
- return false;
- if (!emulator->WriteMemoryUnsigned (context, addr, reg_value, addr_byte_size))
- return false;
- }
- else
- {
- context.arg1 = dwarf_pc; // arg1 in the context is the DWARF register number
- context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset
- const uint32_t pc = emulator->ReadRegisterUnsigned(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, 0, &success);
- if (!success)
- return false;
- if (!emulator->WriteMemoryUnsigned (context, addr, pc + 8, addr_byte_size))
- return false;
- }
-
- context.type = EmulateInstruction::eContextAdjustStackPointer;
- context.arg0 = eRegisterKindGeneric;
- context.arg1 = LLDB_REGNUM_GENERIC_SP;
- context.arg2 = -sp_offset;
-
- if (!emulator->WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, sp - sp_offset))
- return false;
- }
- return true;
-}
-
-// Vector Push stores multiple extension registers to the stack.
-// It also updates SP to point to the start of the stored data.
-static bool
-emulate_vpush (EmulateInstructionARM *emulator, ARMEncoding encoding)
-{
-#if 0
- // ARM pseudo code...
- if (ConditionPassed())
- {
- EncodingSpecificOperations(); CheckVFPEnabled(TRUE); NullCheckIfThumbEE(13);
- address = SP - imm32;
- SP = SP - imm32;
- if single_regs then
- for r = 0 to regs-1
- MemA[address,4] = S[d+r]; address = address+4;
- else
- for r = 0 to regs-1
- // Store as two word-aligned words in the correct order for current endianness.
- MemA[address,4] = if BigEndian() then D[d+r]<63:32> else D[d+r]<31:0>;
- MemA[address+4,4] = if BigEndian() then D[d+r]<31:0> else D[d+r]<63:32>;
- address = address+8;
- }
-#endif
-
- bool success = false;
- const uint32_t opcode = emulator->OpcodeAsUnsigned (&success);
- if (!success)
- return false;
-
- if (emulator->ConditionPassed())
- {
- const uint32_t addr_byte_size = emulator->GetAddressByteSize();
- const addr_t sp = emulator->ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, 0, &success);
- if (!success)
- return false;
- bool single_regs;
- uint32_t d; // UInt(Vd:D) starting register
- uint32_t imm32; // stack offset
- uint32_t regs; // number of registers
- switch (encoding) {
- case eEncodingT1:
- case eEncodingA1:
- single_regs = false;
- d = Bits32(opcode, 15, 12) << 1 | Bits32(opcode, 22, 22);
- imm32 = Bits32(opcode, 7, 0) * addr_byte_size;
- // If UInt(imm8) is odd, see "FSTMX".
- regs = Bits32(opcode, 7, 0) / 2;
- // if regs == 0 || regs > 16 || (d+regs) > 32 then UNPREDICTABLE;
- if (regs == 0 || regs > 16 || (d + regs) > 32)
- return false;
- break;
- case eEncodingT2:
- case eEncodingA2:
- single_regs = true;
- d = Bits32(opcode, 15, 12) << 1 | Bits32(opcode, 22, 22);
- imm32 = Bits32(opcode, 7, 0) * addr_byte_size;
- regs = Bits32(opcode, 7, 0);
- // if regs == 0 || regs > 16 || (d+regs) > 32 then UNPREDICTABLE;
- if (regs == 0 || regs > 16 || (d + regs) > 32)
- return false;
- break;
- default:
- return false;
- }
- uint32_t start_reg = single_regs ? dwarf_s0 : dwarf_d0;
- uint32_t reg_byte_size = single_regs ? addr_byte_size : addr_byte_size * 2;
- addr_t sp_offset = imm32;
- addr_t addr = sp - sp_offset;
- uint32_t i;
-
- EmulateInstruction::Context context = { EmulateInstruction::eContextPushRegisterOnStack, eRegisterKindDWARF, 0, 0 };
- for (i=d; i<regs; ++i)
- {
- context.arg1 = start_reg + i; // arg1 in the context is the DWARF register number
- context.arg2 = addr - sp; // arg2 in the context is the stack pointer offset
- // uint64_t to accommodate 64-bit registers.
- uint64_t reg_value = emulator->ReadRegisterUnsigned(eRegisterKindDWARF, context.arg1, 0, &success);
- if (!success)
- return false;
- if (!emulator->WriteMemoryUnsigned (context, addr, reg_value, reg_byte_size))
- return false;
- addr += reg_byte_size;
- }
-
- context.type = EmulateInstruction::eContextAdjustStackPointer;
- context.arg0 = eRegisterKindGeneric;
- context.arg1 = LLDB_REGNUM_GENERIC_SP;
- context.arg2 = -sp_offset;
-
- if (!emulator->WriteRegisterUnsigned (context, eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, sp - sp_offset))
- return false;
- }
- return true;
-}
-
-static ARMOpcode g_arm_opcodes[] =
-{
- ///////////////////////////
- // Prologue instructions //
- ///////////////////////////
-
- // push register(s)
- { 0x0fff0000, 0x092d0000, ARMvAll, eEncodingA1, eSize32, emulate_push, "push <registers>" },
- { 0x0fff0fff, 0x052d0004, ARMvAll, eEncodingA2, eSize32, emulate_push, "push <register>" },
-
- // set r7 to point to a stack offset
- { 0x0ffff000, 0x028d7000, ARMvAll, eEncodingA1, eSize32, emulate_add_rd_sp_imm, "add r7, sp, #<const>" },
- { 0x0ffff000, 0x024c7000, ARMvAll, eEncodingA1, eSize32, emulate_sub_r7_ip_imm, "sub r7, ip, #<const>"},
- // set ip to point to a stack offset
- { 0x0fffffff, 0x01a0c00d, ARMvAll, eEncodingA1, eSize32, emulate_mov_rd_sp, "mov ip, sp" },
- { 0x0ffff000, 0x028dc000, ARMvAll, eEncodingA1, eSize32, emulate_add_rd_sp_imm, "add ip, sp, #<const>" },
- { 0x0ffff000, 0x024dc000, ARMvAll, eEncodingA1, eSize32, emulate_sub_ip_sp_imm, "sub ip, sp, #<const>"},
-
- // adjust the stack pointer
- { 0x0ffff000, 0x024dd000, ARMvAll, eEncodingA1, eSize32, emulate_sub_sp_imm, "sub sp, sp, #<const>"},
-
- // push one register
- // if Rn == '1101' && imm12 == '000000000100' then SEE PUSH;
- { 0x0fff0000, 0x052d0000, ARMvAll, eEncodingA1, eSize32, emulate_str_rt_sp, "str Rt, [sp, #-imm12]!" },
-
- // vector push consecutive extension register(s)
- { 0x0fbf0f00, 0x0d2d0b00, ARMv6T2|ARMv7, eEncodingA1, eSize32, emulate_vpush, "vpush.64 <list>"},
- { 0x0fbf0f00, 0x0d2d0a00, ARMv6T2|ARMv7, eEncodingA2, eSize32, emulate_vpush, "vpush.32 <list>"},
-
- ///////////////////////////
- // Epilogue instructions //
- ///////////////////////////
-
- { 0x0fff0000, 0x08bd0000, ARMvAll, eEncodingA1, eSize32, emulate_pop, "pop <registers>"},
- { 0x0fff0fff, 0x049d0004, ARMvAll, eEncodingA2, eSize32, emulate_pop, "pop <register>"}
-};
-
-static ARMOpcode g_thumb_opcodes[] =
-{
- ///////////////////////////
- // Prologue instructions //
- ///////////////////////////
-
- // push register(s)
- { 0xfffffe00, 0x0000b400, ARMvAll, eEncodingT1, eSize16, emulate_push, "push <registers>" },
- { 0xffff0000, 0xe92d0000, ARMv6T2|ARMv7, eEncodingT2, eSize32, emulate_push, "push.w <registers>" },
- { 0xffff0fff, 0xf84d0d04, ARMv6T2|ARMv7, eEncodingT3, eSize32, emulate_push, "push.w <register>" },
- // move from high register to low register
- { 0xffffffc0, 0x00004640, ARMvAll, eEncodingT1, eSize16, emulate_mov_low_high, "mov r0-r7, r8-r15" },
-
- // set r7 to point to a stack offset
- { 0xffffff00, 0x0000af00, ARMvAll, eEncodingT1, eSize16, emulate_add_rd_sp_imm, "add r7, sp, #imm" },
- { 0xffffffff, 0x0000466f, ARMvAll, eEncodingT1, eSize16, emulate_mov_rd_sp, "mov r7, sp" },
-
- // PC relative load into register (see also emulate_add_sp_rm)
- { 0xfffff800, 0x00004800, ARMvAll, eEncodingT1, eSize16, emulate_ldr_rd_pc_rel, "ldr <Rd>, [PC, #imm]"},
-
- // adjust the stack pointer
- { 0xffffff87, 0x00004485, ARMvAll, eEncodingT2, eSize16, emulate_add_sp_rm, "add sp, <Rm>"},
- { 0xffffff80, 0x0000b080, ARMvAll, eEncodingT1, eSize16, emulate_sub_sp_imm, "add sp, sp, #imm"},
- { 0xfbef8f00, 0xf1ad0d00, ARMv6T2|ARMv7, eEncodingT2, eSize32, emulate_sub_sp_imm, "sub.w sp, sp, #<const>"},
- { 0xfbff8f00, 0xf2ad0d00, ARMv6T2|ARMv7, eEncodingT3, eSize32, emulate_sub_sp_imm, "subw sp, sp, #imm12"},
-
- // vector push consecutive extension register(s)
- { 0xffbf0f00, 0xed2d0b00, ARMv6T2|ARMv7, eEncodingT1, eSize32, emulate_vpush, "vpush.64 <list>"},
- { 0xffbf0f00, 0xed2d0a00, ARMv6T2|ARMv7, eEncodingT2, eSize32, emulate_vpush, "vpush.32 <list>"},
-
- ///////////////////////////
- // Epilogue instructions //
- ///////////////////////////
-
- { 0xffffff80, 0x0000b000, ARMvAll, eEncodingT2, eSize16, emulate_add_sp_imm, "add sp, #imm"},
- { 0xfffffe00, 0x0000bc00, ARMvAll, eEncodingT1, eSize16, emulate_pop, "pop <registers>"},
- { 0xffff0000, 0xe8bd0000, ARMv6T2|ARMv7, eEncodingT2, eSize32, emulate_pop, "pop.w <registers>" },
- { 0xffff0fff, 0xf85d0d04, ARMv6T2|ARMv7, eEncodingT3, eSize32, emulate_pop, "pop.w <register>" }
-};
-
-static const size_t k_num_arm_opcodes = sizeof(g_arm_opcodes)/sizeof(ARMOpcode);
-static const size_t k_num_thumb_opcodes = sizeof(g_thumb_opcodes)/sizeof(ARMOpcode);
-
-bool
-EmulateInstructionARM::SetTargetTriple (const ConstString &triple)
-{
- m_arm_isa = 0;
- const char *triple_cstr = triple.GetCString();
- if (triple_cstr)
- {
- const char *dash = ::strchr (triple_cstr, '-');
- if (dash)
- {
- std::string arch (triple_cstr, dash);
- const char *arch_cstr = arch.c_str();
- if (strcasecmp(arch_cstr, "armv4t") == 0)
- m_arm_isa = ARMv4T;
- else if (strcasecmp(arch_cstr, "armv4") == 0)
- m_arm_isa = ARMv4;
- else if (strcasecmp(arch_cstr, "armv5tej") == 0)
- m_arm_isa = ARMv5TEJ;
- else if (strcasecmp(arch_cstr, "armv5te") == 0)
- m_arm_isa = ARMv5TE;
- else if (strcasecmp(arch_cstr, "armv5t") == 0)
- m_arm_isa = ARMv5T;
- else if (strcasecmp(arch_cstr, "armv6k") == 0)
- m_arm_isa = ARMv6K;
- else if (strcasecmp(arch_cstr, "armv6") == 0)
- m_arm_isa = ARMv6;
- else if (strcasecmp(arch_cstr, "armv6t2") == 0)
- m_arm_isa = ARMv6T2;
- else if (strcasecmp(arch_cstr, "armv7") == 0)
- m_arm_isa = ARMv7;
- else if (strcasecmp(arch_cstr, "armv8") == 0)
- m_arm_isa = ARMv8;
- }
- }
- return m_arm_isa != 0;
-}
-
-
-bool
-EmulateInstructionARM::ReadInstruction ()
-{
- bool success = false;
- m_inst_cpsr = ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_FLAGS, 0, &success);
- if (success)
- {
- addr_t pc = ReadRegisterUnsigned (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_ADDRESS, &success);
- if (success)
- {
- Context read_inst_context = {eContextReadOpcode, 0, 0};
- if (m_inst_cpsr & MASK_CPSR_T)
- {
- m_inst_mode = eModeThumb;
- uint32_t thumb_opcode = ReadMemoryUnsigned(read_inst_context, pc, 2, 0, &success);
-
- if (success)
- {
- if ((m_inst.opcode.inst16 & 0xe000) != 0xe000 || ((m_inst.opcode.inst16 & 0x1800u) == 0))
- {
- m_inst.opcode_type = eOpcode16;
- m_inst.opcode.inst16 = thumb_opcode;
- }
- else
- {
- m_inst.opcode_type = eOpcode32;
- m_inst.opcode.inst32 = (thumb_opcode << 16) | ReadMemoryUnsigned(read_inst_context, pc + 2, 2, 0, &success);
- }
- }
- }
- else
- {
- m_inst_mode = eModeARM;
- m_inst.opcode_type = eOpcode32;
- m_inst.opcode.inst32 = ReadMemoryUnsigned(read_inst_context, pc, 4, 0, &success);
- }
- }
- }
- if (!success)
- {
- m_inst_mode = eModeInvalid;
- m_inst_pc = LLDB_INVALID_ADDRESS;
- }
- return success;
-}
-
-uint32_t
-EmulateInstructionARM::CurrentCond ()
-{
- switch (m_inst_mode)
- {
- default:
- case eModeInvalid:
- break;
-
- case eModeARM:
- return UnsignedBits(m_inst.opcode.inst32, 31, 28);
-
- case eModeThumb:
- return 0x0000000Eu; // Return always for now, we need to handl IT instructions later
- }
- return UINT32_MAX; // Return invalid value
-}
-bool
-EmulateInstructionARM::ConditionPassed ()
-{
- if (m_inst_cpsr == 0)
- return false;
-
- const uint32_t cond = CurrentCond ();
-
- if (cond == UINT32_MAX)
- return false;
-
- bool result = false;
- switch (UnsignedBits(cond, 3, 1))
- {
- case 0: result = (m_inst_cpsr & MASK_CPSR_Z) != 0; break;
- case 1: result = (m_inst_cpsr & MASK_CPSR_C) != 0; break;
- case 2: result = (m_inst_cpsr & MASK_CPSR_N) != 0; break;
- case 3: result = (m_inst_cpsr & MASK_CPSR_V) != 0; break;
- case 4: result = ((m_inst_cpsr & MASK_CPSR_C) != 0) && ((m_inst_cpsr & MASK_CPSR_Z) == 0); break;
- case 5:
- {
- bool n = (m_inst_cpsr & MASK_CPSR_N);
- bool v = (m_inst_cpsr & MASK_CPSR_V);
- result = n == v;
- }
- break;
- case 6:
- {
- bool n = (m_inst_cpsr & MASK_CPSR_N);
- bool v = (m_inst_cpsr & MASK_CPSR_V);
- result = n == v && ((m_inst_cpsr & MASK_CPSR_Z) == 0);
- }
- break;
- case 7:
- result = true;
- break;
- }
-
- if (cond & 1)
- result = !result;
- return result;
-}
-
-
-bool
-EmulateInstructionARM::EvaluateInstruction ()
-{
- return false;
-}
Removed: lldb/trunk/source/Plugins/Process/Utility/EmulateInstructionARM.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Plugins/Process/Utility/EmulateInstructionARM.h?rev=124630&view=auto
==============================================================================
--- lldb/trunk/source/Plugins/Process/Utility/EmulateInstructionARM.h (original)
+++ lldb/trunk/source/Plugins/Process/Utility/EmulateInstructionARM.h (removed)
@@ -1,111 +0,0 @@
-//===-- lldb_EmulateInstructionARM.h ------------------------------------*- C++ -*-===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef lldb_EmulateInstructionARM_h_
-#define lldb_EmulateInstructionARM_h_
-
-#include "EmulateInstruction.h"
-#include "ARM_DWARF_Registers.h"
-
-#include "lldb/Core/Error.h"
-
-namespace lldb_private {
-
-class EmulateInstructionARM : public EmulateInstruction
-{
-public:
-
- virtual const char *
- GetPluginName()
- {
- return "EmulateInstructionARM";
- }
-
- virtual const char *
- GetShortPluginName()
- {
- return "lldb.emulate-instruction.arm";
- }
-
- virtual uint32_t
- GetPluginVersion()
- {
- return 1;
- }
-
- virtual void
- GetPluginCommandHelp (const char *command, Stream *strm)
- {
- }
-
- virtual lldb_private::Error
- ExecutePluginCommand (Args &command, Stream *strm)
- {
- Error error;
- error.SetErrorString("no plug-in commands are supported");
- return error;
- }
-
- virtual Log *
- EnablePluginLogging (Stream *strm, Args &command)
- {
- return NULL;
- }
-
- enum Mode
- {
- eModeInvalid,
- eModeARM,
- eModeThumb
- };
-
- EmulateInstructionARM (void *baton,
- ReadMemory read_mem_callback,
- WriteMemory write_mem_callback,
- ReadRegister read_reg_callback,
- WriteRegister write_reg_callback) :
- EmulateInstruction (lldb::eByteOrderLittle, // Byte order for ARM
- 4, // Address size in byte
- baton,
- read_mem_callback,
- write_mem_callback,
- read_reg_callback,
- write_reg_callback),
- m_arm_isa (0),
- m_inst_mode (eModeInvalid),
- m_inst_cpsr (0)
- {
- }
-
-
- virtual bool
- SetTargetTriple (const ConstString &triple);
-
- virtual bool
- ReadInstruction ();
-
- virtual bool
- EvaluateInstruction ();
-
- bool
- ConditionPassed ();
-
- uint32_t
- CurrentCond ();
-
-protected:
- uint32_t m_arm_isa;
- Mode m_inst_mode;
- uint32_t m_inst_cpsr;
-
-};
-
-} // namespace lldb_private
-
-#endif // lldb_EmulateInstructionARM_h_
More information about the lldb-commits
mailing list