[libcxx-commits] [PATCH] D134216: [SystemZ][z/OS] add code for hardware_concurrency()

[Muiez Ahmed via Phabricator via libcxx-commits]

muiez updated this revision to Diff 471569.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D134216/new/

https://reviews.llvm.org/D134216

Files:
  libcxx/src/thread.cpp


Index: libcxx/src/thread.cpp
===================================================================
--- libcxx/src/thread.cpp
+++ libcxx/src/thread.cpp
@@ -86,6 +86,28 @@
     SYSTEM_INFO info;
     GetSystemInfo(&info);
     return info.dwNumberOfProcessors;
+#elif defined(__MVS__)
+  // The following offsets are from the MVS Data Areas Volumes 1 & 3:
+  // Volume 1: https://www-01.ibm.com/servers/resourcelink/svc00100.nsf/pages/
+  //           zosv2r3ga320935/$file/iead100_v2r3.pdf
+  // Volume 3: https://www-01.ibm.com/servers/resourcelink/svc00100.nsf/pages/
+  //           zosv2r3ga320938/$file/iead300_v2r3.pdf
+  //
+  // In Vol 1, CSD_NUMBER_ONLINE_CPUS is at decimal offset 212 in CSD Mapping
+  // (also Vol 1), which is pointed to by CVTCSD.
+  //
+  // CVTCSD is at decimal offset 660 in CVT Mapping (Vol 1), which is pointed
+  // to by FLCCVT field of the PSA data area.
+  //
+  // FLCCVT is at decimal offset 16 in PSA Mapping (Vol 3), and PSA is at
+  // address 0.
+  //
+  // So, with the 32-bit pointer casts, CSD_NUMBER_ONLINE_CPUS is at
+  // 0[16/4][660/4][212/4] which is 0[4][165][53].
+  //
+  // Note: z/OS is always upward compatible, so these offsets won't change.
+
+  return ((((int* __ptr32* __ptr32* __ptr32)0)[4])[165])[53];
 #else  // defined(CTL_HW) && defined(HW_NCPU)
     // TODO: grovel through /proc or check cpuid on x86 and similar
     // instructions on other architectures.


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