[libc-commits] [PATCH] D132121: [NFC][libc] rearrange aarch64 memset code to better match new implementation

[Guillaume Chatelet via Phabricator via libc-commits]

gchatelet created this revision.
gchatelet added a reviewer: courbet.
Herald added subscribers: libc-commits, ecnelises, tschuett, kristof.beyls.
Herald added projects: libc-project, All.
gchatelet requested review of this revision.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D132121

Files:
  libc/src/string/memory_utils/elements_aarch64.h
  libc/src/string/memory_utils/memset_implementations.h


Index: libc/src/string/memory_utils/memset_implementations.h
===================================================================
--- libc/src/string/memory_utils/memset_implementations.h
+++ libc/src/string/memory_utils/memset_implementations.h
@@ -100,7 +100,9 @@
     splat_set<Tail<_32>>(dst, value, count);
     return;
   }
-  if (count < 448 || value != 0 || !AArch64ZVA(dst, count))
+  if (count >= 448 && value == 0 && hasZva())
+    return splat_set<Align<_64, Arg::_1>::Then<Loop<Zva64>>>(dst, 0, count);
+  else
     return splat_set<Align<_16, Arg::_1>::Then<Loop<_64>>>(dst, value, count);
 #else
   /////////////////////////////////////////////////////////////////////////////
Index: libc/src/string/memory_utils/elements_aarch64.h
===================================================================
--- libc/src/string/memory_utils/elements_aarch64.h
+++ libc/src/string/memory_utils/elements_aarch64.h
@@ -52,8 +52,9 @@
 using _32 = Chained<_16, _16>;
 using _64 = Chained<_32, _32>;
 
-struct ZVA {
+struct Zva64 {
   static constexpr size_t SIZE = 64;
+
   static void splat_set(char *dst, const unsigned char) {
 #if __SIZEOF_POINTER__ == 4
     asm("dc zva, %w[dst]" : : [dst] "r"(dst) : "memory");
@@ -63,13 +64,14 @@
   }
 };
 
-inline static bool AArch64ZVA(char *dst, size_t count) {
+inline static bool hasZva() {
   uint64_t zva_val;
   asm("mrs %[zva_val], dczid_el0" : [zva_val] "=r"(zva_val));
-  if ((zva_val & 31) != 4)
-    return false;
-  splat_set<Align<_64, Arg::_1>::Then<Loop<ZVA, _64>>>(dst, 0, count);
-  return true;
+  // DC ZVA is permitted if DZP, bit [4] is zero.
+  // BS, bits [3:0] is log2 of the block size in words.
+  // So the next line checks whether the instruction is permitted and block size
+  // is 16 words (i.e. 64 bytes).
+  return (zva_val & 0b11111) == 0b00100;
 }
 
 } // namespace aarch64_memset


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