[flang-commits] [flang] [flang] Eliminate workaround for optimizing maxval Fortran intrinsic (PR #65814)
Slava Zakharin via flang-commits
flang-commits at lists.llvm.org
Sat Sep 9 10:02:57 PDT 2023
vzakhari wrote:
Yes, it might be a bit complex to properly check this.
Please try this:
```
subroutine test(x, t)
real(16) :: x(100), t
t = maxval(x)
end subroutine test
```
`flang-new -O2 -ffast-math -c maxval.f90`:
```
LLVM ERROR: Cannot select: t27: f128 = fmaximum nnan ninf nsz arcp contract afn reassoc t26, t25
t26: f128,ch = load<(load (s128) from %ir.scevgep, !tbaa !3)> t0, t5, undef:i64
t5: i64 = add t2, t4
t2: i64,ch = CopyFromReg t0, Register:i64 %4
t1: i64 = Register %4
t4: i64,ch = CopyFromReg t0, Register:i64 %0
t3: i64 = Register %0
t9: i64 = undef
t25: f128 = fmaximum nnan ninf nsz arcp contract afn reassoc t24, t21
t24: f128,ch = load<(load (s128) from %ir.scevgep2, !tbaa !3)> t0, t23, undef:i64
t23: i64 = add t5, Constant:i64<-16>
t5: i64 = add t2, t4
t2: i64,ch = CopyFromReg t0, Register:i64 %4
t1: i64 = Register %4
t4: i64,ch = CopyFromReg t0, Register:i64 %0
t3: i64 = Register %0
t22: i64 = Constant<-16>
t9: i64 = undef
t21: f128 = fmaximum nnan ninf nsz arcp contract afn reassoc t20, t17
t20: f128,ch = load<(load (s128) from %ir.scevgep4, !tbaa !3)> t0, t19, undef:i64
t19: i64 = add t5, Constant:i64<-32>
t5: i64 = add t2, t4
t2: i64,ch = CopyFromReg t0, Register:i64 %4
t1: i64 = Register %4
t4: i64,ch = CopyFromReg t0, Register:i64 %0
t3: i64 = Register %0
t18: i64 = Constant<-32>
t9: i64 = undef
t17: f128 = fmaximum nnan ninf nsz arcp contract afn reassoc t16, t13
t16: f128,ch = load<(load (s128) from %ir.scevgep6, !tbaa !3)> t0, t15, undef:i64
t15: i64 = add t5, Constant:i64<-48>
t5: i64 = add t2, t4
t2: i64,ch = CopyFromReg t0, Register:i64 %4
t1: i64 = Register %4
t4: i64,ch = CopyFromReg t0, Register:i64 %0
t3: i64 = Register %0
t14: i64 = Constant<-48>
t9: i64 = undef
t13: f128 = fmaximum nnan ninf nsz arcp contract afn reassoc t10, t12
t10: f128,ch = load<(load (s128) from %ir.scevgep8, !tbaa !3)> t0, t7, undef:i64
t7: i64 = add t5, Constant:i64<-64>
t5: i64 = add t2, t4
t2: i64,ch = CopyFromReg t0, Register:i64 %4
t1: i64 = Register %4
t4: i64,ch = CopyFromReg t0, Register:i64 %0
t3: i64 = Register %0
t6: i64 = Constant<-64>
t9: i64 = undef
t12: f128,ch = CopyFromReg t0, Register:f128 %1
t11: f128 = Register %1
In function: test_
```
https://github.com/llvm/llvm-project/pull/65814
More information about the flang-commits
mailing list