[flang-commits] [clang-tools-extra] [clang] [llvm] [compiler-rt] [flang] [PowerPC][CodeGen] Exploit STMW and LMW in 32-bit big-endian mode. (PR #74415)

Chen Zheng via flang-commits flang-commits at lists.llvm.org
Thu Dec 7 03:00:09 PST 2023


================
@@ -0,0 +1,138 @@
+; RUN: llc -mtriple=powerpc-unknown-aix-xcoff -verify-machineinstrs \
+; RUN:     -mcpu=pwr4 -mattr=-altivec --ppc-enable-load-store-multiple < %s \
+; RUN:     | FileCheck %s
+
+; CHECK:      # %bb.0:                                # %entry
+; CHECK-NEXT: 	mflr 0
+; CHECK-NEXT: 	stwu 1, -128(1)
+; CHECK-NEXT: 	cmpwi	5, 0
+; CHECK-NEXT: 	stw 0, 136(1)
+; CHECK-NEXT: 	stmw 16, 64(1)                          # 4-byte Folded Spill
+; CHECK-NEXT: 	ble 0, L..BB0_11
+
+; CHECK:      L..BB0_12:                              # %for.cond.cleanup
+; CHECK-NEXT: 	lwz 3, L..C0(2)                         # @a
+; CHECK-NEXT: 	lwz 4, L..C1(2)                         # @b
+; CHECK-NEXT: 	lwz 5, L..C4(2)                         # @c
+; CHECK-NEXT: 	lwz 6, L..C7(2)                         # @d
+; CHECK-NEXT: 	lwz 7, L..C6(2)                         # @e
+; CHECK-NEXT: 	lmw 16, 64(1)                           # 4-byte Folded Reload
+; CHECK-NEXT: 	lwz 3, 0(3)
+; CHECK-NEXT: 	lwz 4, 0(4)
+; CHECK-NEXT: 	add 3, 3, 28
+; CHECK-NEXT: 	lwz 5, 0(5)
+; CHECK-NEXT: 	add 3, 3, 4
+; CHECK-NEXT: 	lwz 6, 0(6)
+; CHECK-NEXT: 	add 3, 3, 5
+; CHECK-NEXT: 	lwz 4, 0(7)
+; CHECK-NEXT: 	add 3, 3, 6
+; CHECK-NEXT: 	add 3, 3, 4
+; CHECK-NEXT: 	lwz 31, 124(1)                          # 4-byte Folded Reload
+; CHECK-NEXT: 	addi 1, 1, 128
+; CHECK-NEXT: 	lwz 0, 8(1)
+; CHECK-NEXT: 	mtlr 0
+; CHECK-NEXT: 	bl
+
+ at a = external local_unnamed_addr global i32, align 4
----------------
chenzheng1030 wrote:

case is too complicated. Please use below one

```
define dso_local void @test_simple() #0 {
entry:
  call void asm sideeffect "nop", "~{r13}"()
  ret void
}
```

https://github.com/llvm/llvm-project/pull/74415


More information about the flang-commits mailing list