[flang-commits] [flang] ade0aa6 - [flang][openacc] Generate the declare register function

[Valentin Clement via flang-commits]

Author: Valentin Clement
Date: 2023-08-09T10:25:30-07:00
New Revision: ade0aa6163e0b679dfc688dc4074184d3b406d88

URL: https://github.com/llvm/llvm-project/commit/ade0aa6163e0b679dfc688dc4074184d3b406d88
DIFF: https://github.com/llvm/llvm-project/commit/ade0aa6163e0b679dfc688dc4074184d3b406d88.diff

LOG: [flang][openacc] Generate the declare register function

Generate the register function for global declare
variable. This function is meant to be called after the
actual data is allocated. Patch to insert the function call
and attribute will follow.

Depends on D157338

Reviewed By: razvanlupusoru

Differential Revision: https://reviews.llvm.org/D157339

Added: 
    

Modified: 
    flang/lib/Lower/OpenACC.cpp
    flang/test/Lower/OpenACC/acc-declare.f90

Removed: 
    


################################################################################
diff  --git a/flang/lib/Lower/OpenACC.cpp b/flang/lib/Lower/OpenACC.cpp
index 1c5ccd29468fe5..5e14f9cc53ec52 100644
--- a/flang/lib/Lower/OpenACC.cpp
+++ b/flang/lib/Lower/OpenACC.cpp
@@ -2346,6 +2346,53 @@ static void createDeclareGlobalOp(mlir::OpBuilder &modBuilder,
   modBuilder.setInsertionPointAfter(declareGlobalOp);
 }
 
+template <typename EntryOp>
+static void createRegisterFunc(mlir::OpBuilder &modBuilder,
+                               fir::FirOpBuilder &builder, mlir::Location loc,
+                               fir::GlobalOp &globalOp,
+                               mlir::acc::DataClause clause) {
+  std::stringstream registerFuncName;
+  registerFuncName << globalOp.getSymName().str()
+                   << "_acc_declare_update_desc_post_alloc";
+  auto funcTy = mlir::FunctionType::get(modBuilder.getContext(), {}, {});
+  mlir::func::FuncOp registerFuncOp = modBuilder.create<mlir::func::FuncOp>(
+      loc, registerFuncName.str(), funcTy);
+  registerFuncOp.setVisibility(mlir::SymbolTable::Visibility::Private);
+
+  builder.createBlock(&registerFuncOp.getRegion(),
+                      registerFuncOp.getRegion().end(), {}, {});
+  builder.setInsertionPointToEnd(&registerFuncOp.getRegion().back());
+
+  fir::AddrOfOp addrOp = builder.create<fir::AddrOfOp>(
+      loc, fir::ReferenceType::get(globalOp.getType()), globalOp.getSymbol());
+  auto loadOp = builder.create<fir::LoadOp>(loc, addrOp.getResult());
+  fir::BoxAddrOp boxAddrOp = builder.create<fir::BoxAddrOp>(loc, loadOp);
+  addDeclareAttr(builder, boxAddrOp.getOperation(), clause);
+
+  std::stringstream asFortran;
+  asFortran << Fortran::lower::mangle::demangleName(globalOp.getSymName());
+  llvm::SmallVector<mlir::Value> bounds;
+  EntryOp entryOp = createDataEntryOp<EntryOp>(
+      builder, loc, boxAddrOp.getResult(), asFortran, bounds,
+      /*structured=*/false, /*implicit=*/false, clause, boxAddrOp.getType());
+  builder.create<mlir::acc::DeclareEnterOp>(
+      loc, mlir::ValueRange(entryOp.getAccPtr()));
+
+  asFortran << "_desc";
+  mlir::acc::UpdateDeviceOp updateDeviceOp =
+      createDataEntryOp<mlir::acc::UpdateDeviceOp>(
+          builder, loc, addrOp, asFortran, bounds,
+          /*structured=*/false, /*implicit=*/true,
+          mlir::acc::DataClause::acc_update_device, addrOp.getType());
+  llvm::SmallVector<int32_t> operandSegments{0, 0, 0, 0, 0, 1};
+  llvm::SmallVector<mlir::Value> operands{updateDeviceOp.getResult()};
+  mlir::acc::UpdateOp updateOp = createSimpleOp<mlir::acc::UpdateOp>(
+      builder, loc, operands, operandSegments);
+
+  builder.create<mlir::func::ReturnOp>(loc);
+  modBuilder.setInsertionPointAfter(registerFuncOp);
+}
+
 template <typename EntryOp, typename ExitOp>
 static void genGlobalCtors(Fortran::lower::AbstractConverter &converter,
                            mlir::OpBuilder &modBuilder,
@@ -2374,6 +2421,8 @@ static void genGlobalCtors(Fortran::lower::AbstractConverter &converter,
                                         mlir::acc::DeclareEnterOp, ExitOp>(
                       modBuilder, builder, operandLocation, globalOp, clause,
                       /*implicit=*/true);
+                  createRegisterFunc<EntryOp>(
+                      modBuilder, builder, operandLocation, globalOp, clause);
                 } else {
                   createDeclareGlobalOp<mlir::acc::GlobalConstructorOp, EntryOp,
                                         mlir::acc::DeclareEnterOp, ExitOp>(

diff  --git a/flang/test/Lower/OpenACC/acc-declare.f90 b/flang/test/Lower/OpenACC/acc-declare.f90
index baf74c60cab811..18e625b9a807e5 100644
--- a/flang/test/Lower/OpenACC/acc-declare.f90
+++ b/flang/test/Lower/OpenACC/acc-declare.f90
@@ -236,6 +236,17 @@ module acc_declare_allocatable_test
 ! CHECK:         acc.terminator
 ! CHECK:       }
 
+! CHECK-LABEL: func.func private @_QMacc_declare_allocatable_testEdata1_acc_declare_update_desc_post_alloc() {
+! CHECK:         %[[GLOBAL_ADDR:.*]] = fir.address_of(@_QMacc_declare_allocatable_testEdata1) : !fir.ref<!fir.box<!fir.heap<!fir.array<?xi32>>>>
+! CHECK:         %[[LOAD:.*]] = fir.load %[[GLOBAL_ADDR]] : !fir.ref<!fir.box<!fir.heap<!fir.array<?xi32>>>>
+! CHECK:         %[[BOXADDR:.*]] = fir.box_addr %[[LOAD]] {acc.declare = #acc.declare<dataClause =  acc_create>} : (!fir.box<!fir.heap<!fir.array<?xi32>>>) -> !fir.heap<!fir.array<?xi32>>
+! CHECK:         %[[CREATE:.*]] = acc.create varPtr(%[[BOXADDR]] : !fir.heap<!fir.array<?xi32>>) -> !fir.heap<!fir.array<?xi32>> {name = "data1", structured = false}
+! CHECK:         acc.declare_enter dataOperands(%[[CREATE]] : !fir.heap<!fir.array<?xi32>>)
+! CHECK:         %[[UPDATE:.*]] = acc.update_device varPtr(%[[GLOBAL_ADDR]] : !fir.ref<!fir.box<!fir.heap<!fir.array<?xi32>>>>) -> !fir.ref<!fir.box<!fir.heap<!fir.array<?xi32>>>> {implicit = true, name = "data1_desc", structured = false}
+! CHECK:         acc.update dataOperands(%[[UPDATE]] : !fir.ref<!fir.box<!fir.heap<!fir.array<?xi32>>>>)
+! CHECK:         return
+! CHECK:       }
+
 ! CHECK-LABEL: acc.global_dtor @_QMacc_declare_allocatable_testEdata1_acc_dtor {
 ! CHECK:         %[[GLOBAL_ADDR:.*]] = fir.address_of(@_QMacc_declare_allocatable_testEdata1) {acc.declare = #acc.declare<dataClause =  acc_create>} : !fir.ref<!fir.box<!fir.heap<!fir.array<?xi32>>>>
 ! CHECK:         %[[DEVICEPTR:.*]] = acc.getdeviceptr varPtr(%[[GLOBAL_ADDR]] : !fir.ref<!fir.box<!fir.heap<!fir.array<?xi32>>>>)   -> !fir.ref<!fir.box<!fir.heap<!fir.array<?xi32>>>> {dataClause = #acc<data_clause acc_create>, name = "data1", structured = false}