[cfe-dev] ARM assembler regression?

Oliver Stannard oliver.stannard at arm.com
Fri Nov 7 05:51:38 PST 2014

Hi İsmail,


I committed a patch (r221341) a few days ago to prevent the assembler and disassembler form accepting D16-D31 for the FPUs of Cortex-M cores, which only have 16 D registers. I’m assuming you were originally compiling for v7M? It looks like that file will need some additional conditionalization before it can be used for Cortex-M targets.




From: cfe-dev-bounces at cs.uiuc.edu [mailto:cfe-dev-bounces at cs.uiuc.edu] On Behalf Of Ismail Dönmez
Sent: 07 November 2014 12:19
To: Renato Golin
Cc: cfe-dev at cs.uiuc.edu
Subject: Re: [cfe-dev] ARM assembler regression?




On Fri, Nov 7, 2014 at 2:17 PM, Renato Golin <renato.golin at linaro.org> wrote:

On 6 November 2014 18:14, İsmail Dönmez <ismail at donmez.ws> wrote:
> Hmm indeed but this used to work fine? Any other sane options for mfpu?
> Especially for machines without a Neon unit (Marvell seems to have those).

You got me wrong. The fpu is sane, and that used to work, but it's not
a regression in the assembler, rather, in the assembly code. :)


Yeah I found that later on and switch to -mfpu=vfpv3 as a temporary hack :)


That code is assuming all VFP have 32 double registers, when that's
not true. I'll fix it.



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