[clang] 1faf8db - [clang-repl] Emit an AMDGPU object for the HIP device module (#234498)

via cfe-commits cfe-commits at lists.llvm.org
Thu Oct 22 04:24:06 PDT 2026


Author: Aditya Sinha
Date: 2026-10-22T11:24:00Z
New Revision: 1faf8dba065de5bb980422410b5883c51aa4af09

URL: https://github.com/llvm/llvm-project/commit/1faf8dba065de5bb980422410b5883c51aa4af09
DIFF: https://github.com/llvm/llvm-project/commit/1faf8dba065de5bb980422410b5883c51aa4af09.diff

LOG: [clang-repl] Emit an AMDGPU object for the HIP device module (#234498)

This PR adds code generation to the `IncrementalHIPDeviceParser`. It
takes the last PTU's device module and converts it into an AMDGPU device
object in the memory. `GenerateOffloadBinary()` is updated to call it
and after that it returns the same error as before.

Added: 
    

Modified: 
    clang/lib/Interpreter/DeviceOffload.cpp
    clang/lib/Interpreter/DeviceOffload.h
    clang/unittests/Interpreter/DeviceOffloadTest.cpp

Removed: 
    


################################################################################
diff  --git a/clang/lib/Interpreter/DeviceOffload.cpp b/clang/lib/Interpreter/DeviceOffload.cpp
index 31fa20fff450da..94fec23b1c0b2f 100644
--- a/clang/lib/Interpreter/DeviceOffload.cpp
+++ b/clang/lib/Interpreter/DeviceOffload.cpp
@@ -14,6 +14,7 @@
 #include "DeviceOffload.h"
 
 #include "clang/Basic/TargetOptions.h"
+#include "clang/CodeGen/BackendUtil.h"
 #include "clang/CodeGen/ModuleBuilder.h"
 #include "clang/Frontend/CompilerInstance.h"
 #include "clang/Interpreter/PartialTranslationUnit.h"
@@ -43,7 +44,8 @@ IncrementalHIPDeviceParser::IncrementalHIPDeviceParser(
     llvm::IntrusiveRefCntPtr<llvm::vfs::InMemoryFileSystem> FS,
     llvm::Error &Err, std::list<PartialTranslationUnit> &PTUs)
     : IncrementalDeviceParser(DeviceInstance, HostInstance, DeviceAct, FS, Err,
-                              PTUs) {
+                              PTUs),
+      DeviceCI(DeviceInstance) {
   if (Err)
     return;
   if (!llvm::Triple(TargetOpts.Triple).isAMDGCN()) {
@@ -56,8 +58,34 @@ IncrementalHIPDeviceParser::IncrementalHIPDeviceParser(
   }
 }
 
+llvm::Expected<llvm::StringRef>
+IncrementalHIPDeviceParser::GenerateDeviceObject() {
+  auto &PTU = PTUs.back();
+
+  CodeGenOptions CodeGenOptsForObj = DeviceCI.getCodeGenOpts();
+  CodeGenOptsForObj.DisableLLVMPasses = true;
+
+  ObjectContent.clear();
+  auto ObjOS = std::make_unique<llvm::raw_svector_ostream>(ObjectContent);
+  emitBackendOutput(DeviceCI, CodeGenOptsForObj, PTU.TheModule.get(),
+                    Backend_EmitObj, DeviceCI.getVirtualFileSystemPtr(),
+                    std::move(ObjOS));
+
+  if (DeviceCI.getDiagnostics().hasErrorOccurred())
+    return llvm::make_error<llvm::StringError>(
+        "Backend code generation failed for HIP device code.",
+        llvm::inconvertibleErrorCode());
+
+  return llvm::StringRef(ObjectContent.data(), ObjectContent.size());
+}
+
 llvm::Error IncrementalHIPDeviceParser::GenerateOffloadBinary() {
-  // FIXME: Generate the HSACO and bundle it for the host compilation.
+  llvm::Expected<llvm::StringRef> Object = GenerateDeviceObject();
+  if (!Object)
+    return Object.takeError();
+
+  // FIXME: Link the object into an HSACO and bundle it for the host
+  // compilation.
   return llvm::make_error<llvm::StringError>(
       "HIP offload binary generation is not supported yet.",
       llvm::inconvertibleErrorCode());

diff  --git a/clang/lib/Interpreter/DeviceOffload.h b/clang/lib/Interpreter/DeviceOffload.h
index 0275c0e10cda80..79326fdbee545b 100644
--- a/clang/lib/Interpreter/DeviceOffload.h
+++ b/clang/lib/Interpreter/DeviceOffload.h
@@ -45,6 +45,11 @@ class IncrementalDeviceParser : public IncrementalParser {
 };
 
 class IncrementalHIPDeviceParser : public IncrementalDeviceParser {
+  CompilerInstance &DeviceCI;
+  llvm::SmallVector<char, 0> ObjectContent;
+
+  // Generate the AMDGPU object file for the last PTU.
+  llvm::Expected<llvm::StringRef> GenerateDeviceObject();
 
 public:
   IncrementalHIPDeviceParser(

diff  --git a/clang/unittests/Interpreter/DeviceOffloadTest.cpp b/clang/unittests/Interpreter/DeviceOffloadTest.cpp
index bac7fdd53408f7..6cd052ac4701f9 100644
--- a/clang/unittests/Interpreter/DeviceOffloadTest.cpp
+++ b/clang/unittests/Interpreter/DeviceOffloadTest.cpp
@@ -123,6 +123,33 @@ TEST(DeviceOffloadBuilderTest, MultipleOffloadArchsAreRejected) {
                               "supported. Pass a single --offload-arch"));
 }
 
+TEST(DeviceOffloadHIPTest, DeviceObjectIsGenerated) {
+  llvm::InitializeAllTargets();
+  llvm::InitializeAllTargetMCs();
+  llvm::InitializeAllAsmPrinters();
+  std::string Err;
+  if (!llvm::TargetRegistry::lookupTarget(llvm::Triple("amdgcn-amd-amdhsa"),
+                                          Err))
+    GTEST_SKIP() << Err;
+
+  IncrementalCompilerBuilder CB;
+  CB.SetCompilerArgs({"--offload-arch=gfx1100", "-nogpulib", "-nogpuinc"});
+  auto DeviceCI = CB.CreateDevice(OffloadType::HIP);
+  ASSERT_THAT_EXPECTED(DeviceCI, llvm::Succeeded());
+  auto HostCI = CB.CreateHost(OffloadType::HIP);
+  ASSERT_THAT_EXPECTED(HostCI, llvm::Succeeded());
+  auto Interp = Interpreter::createWithDevice(
+      std::move(*HostCI), std::move(*DeviceCI), OffloadType::HIP);
+  ASSERT_THAT_EXPECTED(Interp, llvm::Succeeded());
+
+  // FIXME: Replace this with a check of the embedded bundle once the offload
+  // binary is generated.
+  auto PTU = (*Interp)->Parse("__attribute__((device)) void f() {}");
+  EXPECT_THAT_EXPECTED(
+      PTU, llvm::FailedWithMessage("HIP offload binary generation is not "
+                                   "supported yet."));
+}
+
 // A bitcode library with one float(float) function that doubles its argument,
 // or an empty one when Name is empty.
 static void writeLibrary(int FD, llvm::StringRef Name) {


        


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