[clang] [llvm] [AMDGPU] Support xnack on/off on gfx125x (PR #232080)
Stanislav Mekhanoshin via cfe-commits
cfe-commits at lists.llvm.org
Wed Oct 14 13:48:13 PDT 2026
https://github.com/rampitec updated https://github.com/llvm/llvm-project/pull/232080
>From bd59a5e3f317fb71cd1064a051852a3c4041b066 Mon Sep 17 00:00:00 2001
From: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: Wed, 14 Oct 2026 12:14:32 -0700
Subject: [PATCH] [AMDGPU] Support xnack on/off on gfx125x
Default is 'any'm effectively same as 'on'.
---
.../Driver/amdgpu-openmp-sanitize-options.c | 4 +-
clang/test/Driver/amdgpu-validate-sanitize.cl | 2 +-
clang/test/Driver/hip-sanitize-options.hip | 4 +-
clang/test/Driver/invalid-target-id.cl | 21 -------
clang/test/Driver/rocm-device-libs.cl | 4 +-
llvm/docs/AMDGPUUsage.rst | 8 +--
llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp | 6 +-
llvm/lib/Target/AMDGPU/GCNFeatures.td | 4 ++
llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 8 +--
.../module-flag-xnack-no-on-off-modes.ll | 59 -------------------
.../AMDGPU/target-id-xnack-always-on.ll | 24 --------
llvm/test/MC/AMDGPU/elf-xnack-hardwired.s | 6 --
.../TargetParser/TargetParserTest.cpp | 7 +--
13 files changed, 24 insertions(+), 133 deletions(-)
delete mode 100644 llvm/test/CodeGen/AMDGPU/module-flag-xnack-no-on-off-modes.ll
delete mode 100644 llvm/test/CodeGen/AMDGPU/target-id-xnack-always-on.ll
delete mode 100644 llvm/test/MC/AMDGPU/elf-xnack-hardwired.s
diff --git a/clang/test/Driver/amdgpu-openmp-sanitize-options.c b/clang/test/Driver/amdgpu-openmp-sanitize-options.c
index 052595a2132ec3..29cb16a92687e0 100644
--- a/clang/test/Driver/amdgpu-openmp-sanitize-options.c
+++ b/clang/test/Driver/amdgpu-openmp-sanitize-options.c
@@ -26,8 +26,8 @@
// RUN: %clang -no-canonical-prefixes -### --target=x86_64-unknown-linux-gnu -fopenmp=libomp --offload-arch=gfx908:xnack+ --offload-arch=gfx900:xnack+ -fsanitize=address -fgpu-sanitize --rocm-path=%S/Inputs/rocm %s 2>&1 \
// RUN: | FileCheck -check-prefixes=HOSTSAN,GPUSAN,SAN %s
-// GPU ASan enabled for amdgpu-arch [gfx1250,gfx1251]
-// RUN: %clang -no-canonical-prefixes -### --target=x86_64-unknown-linux-gnu -fopenmp=libomp --offload-arch=gfx1250,gfx1251 -fsanitize=address -fgpu-sanitize --rocm-path=%S/Inputs/rocm %s 2>&1 \
+// GPU ASan enabled for amdgpu-arch [gfx1250:xnack+,gfx1251:xnack+]
+// RUN: %clang -no-canonical-prefixes -### --target=x86_64-unknown-linux-gnu -fopenmp=libomp --offload-arch=gfx1250:xnack+,gfx1251:xnack+ -fsanitize=address -fgpu-sanitize --rocm-path=%S/Inputs/rocm %s 2>&1 \
// RUN: | FileCheck -check-prefixes=HOSTSAN,GPUSAN,SAN %s
// GPU ASan Disabled Test Cases
diff --git a/clang/test/Driver/amdgpu-validate-sanitize.cl b/clang/test/Driver/amdgpu-validate-sanitize.cl
index 91131b8cf8ddb8..53379f9558a0f5 100644
--- a/clang/test/Driver/amdgpu-validate-sanitize.cl
+++ b/clang/test/Driver/amdgpu-validate-sanitize.cl
@@ -3,7 +3,7 @@
// RUN: -nogpuinc --rocm-path=%S/Inputs/rocm \
// RUN: %s 2>&1 | FileCheck %s
-// RUN: %clang -### --target=amdgcn-amd-amdhsa -mcpu=gfx1250 \
+// RUN: %clang -### --target=amdgcn-amd-amdhsa -mcpu=gfx1250:xnack+ \
// RUN: -fsanitize=address \
// RUN: -nogpuinc --rocm-path=%S/Inputs/rocm \
// RUN: %s 2>&1 | FileCheck %s
diff --git a/clang/test/Driver/hip-sanitize-options.hip b/clang/test/Driver/hip-sanitize-options.hip
index 1ec723fae33e62..4c14df283f7753 100644
--- a/clang/test/Driver/hip-sanitize-options.hip
+++ b/clang/test/Driver/hip-sanitize-options.hip
@@ -3,12 +3,12 @@
// RUN: -nogpuinc --rocm-path=%S/Inputs/rocm \
// RUN: %s 2>&1 | FileCheck -check-prefixes=NORDC %s
-// RUN: %clang -### --target=x86_64-unknown-linux-gnu --offload-arch=gfx1250,gfx1251 \
+// RUN: %clang -### --target=x86_64-unknown-linux-gnu --offload-arch=gfx1250:xnack+,gfx1251:xnack+ \
// RUN: -fsanitize=address \
// RUN: -nogpuinc --rocm-path=%S/Inputs/rocm \
// RUN: %s 2>&1 | FileCheck -check-prefixes=NORDC %s
-// RUN: %clang -### --target=x86_64-unknown-linux-gnu --offload-arch=gfx12-5-generic \
+// RUN: %clang -### --target=x86_64-unknown-linux-gnu --offload-arch=gfx12-5-generic:xnack+ \
// RUN: -fsanitize=address \
// RUN: -nogpuinc --rocm-path=%S/Inputs/rocm \
// RUN: %s 2>&1 | FileCheck -check-prefixes=NORDC %s
diff --git a/clang/test/Driver/invalid-target-id.cl b/clang/test/Driver/invalid-target-id.cl
index 57b4574814886d..d7a66eeba1dbc5 100644
--- a/clang/test/Driver/invalid-target-id.cl
+++ b/clang/test/Driver/invalid-target-id.cl
@@ -43,24 +43,3 @@
// RUN: %s 2>&1 | FileCheck -check-prefix=NOCOLON %s
// NOCOLON: error: invalid target ID 'gfx900+xnack'
-
-// gfx1250 and gfx12-5-generic do not support xnack on/off modes
-// RUN: not %clang -target amdgcn-amd-amdhsa \
-// RUN: -mcpu=gfx1250:xnack+ -nostdlib \
-// RUN: %s 2>&1 | FileCheck -check-prefix=XNACK-MODE-GFX1250 %s
-
-// RUN: not %clang -target amdgcn-amd-amdhsa \
-// RUN: -mcpu=gfx1250:xnack- -nostdlib \
-// RUN: %s 2>&1 | FileCheck -check-prefix=XNACK-MODE-GFX1250 %s
-
-// XNACK-MODE-GFX1250: error: invalid target ID 'gfx1250:xnack{{[+-]}}'
-
-// RUN: not %clang -target amdgcn-amd-amdhsa \
-// RUN: -mcpu=gfx12-5-generic:xnack+ -nostdlib \
-// RUN: %s 2>&1 | FileCheck -check-prefix=XNACK-MODE-GFX125 %s
-
-// RUN: not %clang -target amdgcn-amd-amdhsa \
-// RUN: -mcpu=gfx12-5-generic:xnack- -nostdlib \
-// RUN: %s 2>&1 | FileCheck -check-prefix=XNACK-MODE-GFX125 %s
-
-// XNACK-MODE-GFX125: error: invalid target ID 'gfx12-5-generic:xnack{{[+-]}}'
diff --git a/clang/test/Driver/rocm-device-libs.cl b/clang/test/Driver/rocm-device-libs.cl
index b5b009b2de9094..d9451145e582b3 100644
--- a/clang/test/Driver/rocm-device-libs.cl
+++ b/clang/test/Driver/rocm-device-libs.cl
@@ -145,13 +145,13 @@
// RUN: 2>&1 | FileCheck --check-prefixes=ASAN,COMMON %s
// RUN: %clang -### -target amdgcn-amd-amdhsa \
-// RUN: -x cl -mcpu=gfx1250 -fsanitize=address \
+// RUN: -x cl -mcpu=gfx1250:xnack+ -fsanitize=address \
// RUN: --rocm-path=%S/Inputs/rocm \
// RUN: %s \
// RUN: 2>&1 | FileCheck --check-prefixes=ASAN,COMMON %s
// RUN: %clang -### -target amdgcn-amd-amdhsa \
-// RUN: -x cl -mcpu=gfx1251 -fsanitize=address \
+// RUN: -x cl -mcpu=gfx1251:xnack+ -fsanitize=address \
// RUN: --rocm-path=%S/Inputs/rocm \
// RUN: %s \
// RUN: 2>&1 | FileCheck --check-prefixes=ASAN,COMMON %s
diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst
index 34dc8354383780..ae2ee181955cc2 100644
--- a/llvm/docs/AMDGPUUsage.rst
+++ b/llvm/docs/AMDGPUUsage.rst
@@ -671,7 +671,7 @@ Every processor supports every OS ABI (see :ref:`amdgpu-os`) with the following
IDs
``gfx1250-strict`` ``amdgpu12.50s`` dGPU - sramecc - Architected *TBA*
- flat
+ - xnack flat
scratch .. TODO::
- Packed
work-item Add product
@@ -683,7 +683,7 @@ Every processor supports every OS ABI (see :ref:`amdgpu-os`) with the following
Clusters
``gfx1250`` ``amdgpu12.50`` APU - sramecc - Architected *TBA*
- flat
+ - xnack flat
scratch .. TODO::
- Packed
work-item Add product
@@ -695,7 +695,7 @@ Every processor supports every OS ABI (see :ref:`amdgpu-os`) with the following
Clusters
``gfx1251`` ``amdgpu12.51`` APU - sramecc - Architected *TBA*
- flat
+ - xnack flat
scratch .. TODO::
- Packed
work-item Add product
@@ -832,7 +832,7 @@ Generic processor code objects are versioned. See :ref:`amdgpu-generic-processor
IDs
``gfx12-5-generic`` ``amdgpu12.5`` - ``gfx1250`` - sramecc - Architected Functionally equivalent to
- - ``gfx1251`` flat scratch gfx1250.
+ - ``gfx1251`` - xnack flat scratch gfx1250.
- Packed
work-item
IDs
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp b/llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
index 7d390573003882..077575896015e8 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
@@ -123,7 +123,7 @@ static HWEvents getEventsForImpl(const MachineInstr &Inst,
assert(Inst.mayLoadOrStore());
HWEvents E = HWEvents::NONE;
if (TII.mayAccessVMEMThroughFlat(Inst)) {
- if (ST.hasWaitXcnt())
+ if (ST.hasWaitXcnt() && ST.isXNACKEnabled())
E |= HWEvents::VMEM_GROUP;
E |= getSimplifiedVMEMEventsFor(Inst, TII);
}
@@ -147,7 +147,7 @@ static HWEvents getEventsForImpl(const MachineInstr &Inst,
// BUFFER_INV increments VM_CNT. BUFFER_WBL2 also needs tracking because an
// S_WAITCNT vmcnt(0) must follow it to ensure the writeback has completed.
HWEvents E = getSimplifiedVMEMEventsFor(Inst, TII);
- if (ST.hasWaitXcnt())
+ if (ST.hasWaitXcnt() && ST.isXNACKEnabled())
E |= HWEvents::VMEM_GROUP;
if (ST.vmemWriteNeedsExpWaitcnt() &&
(Inst.mayStore() || SIInstrInfo::isAtomicRet(Inst)))
@@ -157,7 +157,7 @@ static HWEvents getEventsForImpl(const MachineInstr &Inst,
}
if (TII.isSMRD(Inst)) {
- if (ST.hasWaitXcnt())
+ if (ST.hasWaitXcnt() && ST.isXNACKEnabled())
return HWEvents::SMEM_GROUP | HWEvents::SMEM_ACCESS;
return HWEvents::SMEM_ACCESS;
}
diff --git a/llvm/lib/Target/AMDGPU/GCNFeatures.td b/llvm/lib/Target/AMDGPU/GCNFeatures.td
index e7b49c55260242..09083dcf604d6b 100644
--- a/llvm/lib/Target/AMDGPU/GCNFeatures.td
+++ b/llvm/lib/Target/AMDGPU/GCNFeatures.td
@@ -2591,6 +2591,7 @@ def FeatureISAVersion12_50_STRICT : FeatureSet<
FeatureNeedsAligned2addrDS,
FeatureNoSleepForever,
FeatureSlowMaxMinMulI64Insts,
+ FeatureXNACKOnOffModes,
FeatureSupportsXNACK,
])>;
@@ -2628,6 +2629,7 @@ def FeatureISAVersion12_50 : FeatureSet<
FeatureNeedsTDMDrain,
FeatureNoSleepForever,
FeatureSlowMaxMinMulI64Insts,
+ FeatureXNACKOnOffModes,
FeatureSupportsXNACK,
])>;
@@ -2668,6 +2670,7 @@ def FeatureISAVersion12_51 : FeatureSet<
FeatureDataCacheLineSize128,
FeatureRequiresInitialUnclausedVmem,
FeatureNeedsTDMDrain,
+ FeatureXNACKOnOffModes,
FeatureSupportsXNACK,
])>;
@@ -2693,6 +2696,7 @@ def FeatureISAVersion12_5_Generic: FeatureSet<
FeatureDataCacheLineSize128,
FeatureRequiresInitialUnclausedVmem,
FeatureNeedsTDMDrain,
+ FeatureXNACKOnOffModes,
FeatureSupportsXNACK,
])>;
diff --git a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
index 33fb3c7ca37a0d..1226ea0ac5d6dd 100644
--- a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
@@ -2553,7 +2553,7 @@ bool SIInsertWaitcnts::generateWaitcntInstBefore(
MI);
}
- if (ST.hasWaitXcnt() && Op.isDef())
+ if (ST.hasWaitXcnt() && ST.isXNACKEnabled() && Op.isDef())
ScoreBrackets.determineWaitForPhysReg(AMDGPU::X_CNT, Reg, Wait, MI);
}
}
@@ -2770,7 +2770,7 @@ void SIInsertWaitcnts::updateEventWaitcntAfter(MachineInstr &Inst,
// Set XCNT to zero in the bracket for instructions that implicitly drain
// XCNT.
- if (ST.hasWaitXcnt() && SIInstrInfo::isXcntDrain(Inst))
+ if (ST.hasWaitXcnt() && ST.isXNACKEnabled() && SIInstrInfo::isXcntDrain(Inst))
ScoreBrackets->applyWaitcnt(AMDGPU::X_CNT, 0);
}
@@ -3589,7 +3589,7 @@ bool SIInsertWaitcnts::run() {
}
}
- if (ST.hasWaitXcnt())
+ if (ST.hasWaitXcnt() && ST.isXNACKEnabled())
Modified |= removeRedundantSoftXcnts(*MBB);
Modified |= insertWaitcntInBlock(MF, *MBB, *Brackets);
BI.Dirty = false;
@@ -3739,7 +3739,7 @@ bool SIInsertWaitcnts::run() {
if (MFI->isEntryFunction()) {
MachineBasicBlock::iterator InsertPt = EntryBB.begin();
- if (ST.hasWaitXcnt()) {
+ if (ST.hasWaitXcnt() && ST.isXNACKEnabled()) {
// Set REPLAY_MODE (bit 25) in MODE register to enable multi-group XNACK
// replay. This aligns hardware behavior with the compiler's s_wait_xcnt
// insertion logic, which assumes multi-group mode by default.
diff --git a/llvm/test/CodeGen/AMDGPU/module-flag-xnack-no-on-off-modes.ll b/llvm/test/CodeGen/AMDGPU/module-flag-xnack-no-on-off-modes.ll
deleted file mode 100644
index ba0cfd05b27379..00000000000000
--- a/llvm/test/CodeGen/AMDGPU/module-flag-xnack-no-on-off-modes.ll
+++ /dev/null
@@ -1,59 +0,0 @@
-; Test targets without xnack on/off mode support ignore module flags
-; Targets that support xnack but not xnack on/off modes have xnack always on
-; and ignore module flag settings.
-; The target ID should not contain the xnack specifier.
-
-; RUN: split-file %s %t
-; RUN: llc -mtriple=amdgpu12.5-amd-amdhsa < %t/on.ll | FileCheck --check-prefix=CHECK %s
-; RUN: llc -mtriple=amdgpu12.5-amd-amdhsa < %t/off.ll | FileCheck --check-prefix=CHECK %s
-; RUN: llc -mtriple=amdgpu12.5-amd-amdhsa < %t/absent.ll | FileCheck --check-prefix=CHECK %s
-
-; RUN: llc -mtriple=amdgpu12.50-amd-amdhsa < %t/on.ll | FileCheck --check-prefix=CHECK %s
-; RUN: llc -mtriple=amdgpu12.50-amd-amdhsa < %t/off.ll | FileCheck --check-prefix=CHECK %s
-; RUN: llc -mtriple=amdgpu12.50-amd-amdhsa < %t/absent.ll | FileCheck --check-prefix=CHECK %s
-
-; RUN: llc -mtriple=amdgpu12.51-amd-amdhsa < %t/on.ll | FileCheck --check-prefix=CHECK %s
-; RUN: llc -mtriple=amdgpu12.51-amd-amdhsa < %t/off.ll | FileCheck --check-prefix=CHECK %s
-; RUN: llc -mtriple=amdgpu12.51-amd-amdhsa < %t/absent.ll | FileCheck --check-prefix=CHECK %s
-
-; The ELF XNACK mode bits must be zero even though XNACK is always enabled.
-; RUN: llc -mtriple=amdgpu12.50-amd-amdhsa --amdhsa-code-object-version=5 -filetype=obj < %t/absent.ll | llvm-readobj --file-headers - | FileCheck --check-prefix=ELF %s
-
-; ELF: Flags [ (0x449)
-
-; Module flags are ignored - target ID has no xnack specifier
-; CHECK: .amdgcn_target "amdgpu12.5{{[0-1]?}}-amd-amdhsa-unknown-gfx{{12-5-generic|1250|1251}}"
-
-; Targets without on/off mode support always have xnack enabled,
-; so loads must not overwrite pointer arguments (same behavior regardless of module flag)
-; CHECK-LABEL: {{^}}simple_clause:
-; CHECK: flat_load_b32 v4, v[0:1]
-; CHECK-NEXT: flat_load_b32 v5, v[2:3]
-
-;--- on.ll
-define i32 @simple_clause(ptr %ptr0, ptr %ptr1) {
- %val0 = load i32, ptr %ptr0
- %val1 = load i32, ptr %ptr1
- %add = add i32 %val0, %val1
- ret i32 %add
-}
-!llvm.module.flags = !{!0}
-!0 = !{i32 1, !"amdgpu.xnack", i32 1}
-
-;--- off.ll
-define i32 @simple_clause(ptr %ptr0, ptr %ptr1) {
- %val0 = load i32, ptr %ptr0
- %val1 = load i32, ptr %ptr1
- %add = add i32 %val0, %val1
- ret i32 %add
-}
-!llvm.module.flags = !{!0}
-!0 = !{i32 1, !"amdgpu.xnack", i32 0}
-
-;--- absent.ll
-define i32 @simple_clause(ptr %ptr0, ptr %ptr1) {
- %val0 = load i32, ptr %ptr0
- %val1 = load i32, ptr %ptr1
- %add = add i32 %val0, %val1
- ret i32 %add
-}
diff --git a/llvm/test/CodeGen/AMDGPU/target-id-xnack-always-on.ll b/llvm/test/CodeGen/AMDGPU/target-id-xnack-always-on.ll
deleted file mode 100644
index d4680f6e825b20..00000000000000
--- a/llvm/test/CodeGen/AMDGPU/target-id-xnack-always-on.ll
+++ /dev/null
@@ -1,24 +0,0 @@
-; gfx1250, gfx1251, and gfx12-5-generic have xnack always on because they don't
-; support on/off modes (no FeatureXNACKOnOffModes). The target ID should not
-; include xnack modifiers regardless of -mattr settings.
-
-; RUN: llc -mtriple=amdgpu12.50-amd-amdhsa < %s | FileCheck --check-prefix=GFX1250 %s
-; RUN: llc -mtriple=amdgpu12.51-amd-amdhsa < %s | FileCheck --check-prefix=GFX1251 %s
-; RUN: llc -mtriple=amdgpu12.5-amd-amdhsa < %s | FileCheck --check-prefix=GFX125GEN %s
-
-; Even with --amdgpu-xnack=true or --amdgpu-xnack=false, the target ID doesn't change
-; RUN: llc -mtriple=amdgpu12.50-amd-amdhsa --amdgpu-xnack=true < %s | FileCheck --check-prefix=GFX1250 %s
-; RUN: llc -mtriple=amdgpu12.50-amd-amdhsa --amdgpu-xnack=false < %s | FileCheck --check-prefix=GFX1250 %s
-; RUN: llc -mtriple=amdgpu12.51-amd-amdhsa --amdgpu-xnack=true < %s | FileCheck --check-prefix=GFX1251 %s
-; RUN: llc -mtriple=amdgpu12.51-amd-amdhsa --amdgpu-xnack=false < %s | FileCheck --check-prefix=GFX1251 %s
-; RUN: llc -mtriple=amdgpu12.5-amd-amdhsa --amdgpu-xnack=true < %s | FileCheck --check-prefix=GFX125GEN %s
-; RUN: llc -mtriple=amdgpu12.5-amd-amdhsa --amdgpu-xnack=false < %s | FileCheck --check-prefix=GFX125GEN %s
-
-; GFX1250: .amdgcn_target "amdgpu12.50-amd-amdhsa-unknown-gfx1250"
-; GFX1251: .amdgcn_target "amdgpu12.51-amd-amdhsa-unknown-gfx1251"
-; GFX125GEN: .amdgcn_target "amdgpu12.5-amd-amdhsa-unknown-gfx12-5-generic"
-
-define void @func0() {
-entry:
- ret void
-}
diff --git a/llvm/test/MC/AMDGPU/elf-xnack-hardwired.s b/llvm/test/MC/AMDGPU/elf-xnack-hardwired.s
deleted file mode 100644
index 2f61f183f3b7ee..00000000000000
--- a/llvm/test/MC/AMDGPU/elf-xnack-hardwired.s
+++ /dev/null
@@ -1,6 +0,0 @@
-// Hardwired-on XNACK is implied by the processor, not an ELF mode selection.
-// RUN: llvm-mc -triple=amdgpu12.50-amd-amdhsa --amdhsa-code-object-version=6 -filetype=obj %s | llvm-readobj --file-headers - | FileCheck %s
-
-// CHECK: Flags [ (0x449)
-
-s_endpgm
diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp
index 50f0087b14acb2..55a1cc5fc1a18b 100644
--- a/llvm/unittests/TargetParser/TargetParserTest.cpp
+++ b/llvm/unittests/TargetParser/TargetParserTest.cpp
@@ -3560,12 +3560,9 @@ TEST(TargetParserTest, testAMDGPUParseTargetIDString) {
EXPECT_FALSE(TargetID::parseTargetIDString(
"amdgcn-amd-amdhsa-unknown-gfx900:sramecc+"));
- // xnack is only a valid modifier when the processor supports on/off modes.
- // gfx1250 has xnack permanently enabled (xnack supported but without
- // on/off modes), so an xnack modifier is rejected.
- EXPECT_FALSE(TargetID::parseTargetIDString(
+ EXPECT_TRUE(TargetID::parseTargetIDString(
"amdgcn-amd-amdhsa-unknown-gfx1250:xnack+"));
- EXPECT_FALSE(TargetID::parseTargetIDString(
+ EXPECT_TRUE(TargetID::parseTargetIDString(
"amdgcn-amd-amdhsa-unknown-gfx1250:xnack-"));
// A feature modifier with no "+"/"-" sign is rejected.
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